參數(shù)資料
型號: M37902FJCHP
廠商: Mitsubishi Electric Corporation
英文描述: SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
中文描述: 單片16位CMOS微機
文件頁數(shù): 139/143頁
文件大小: 1463K
代理商: M37902FJCHP
Corrections and
Page
Page 64,
Fig. 65,
bits
2
bi
t
5, bit 6
Supplement
ar
Erro
y
Explanation
r
for M37902FxC Dat
asheet (REV.
Correction
B) NO.7
(7/11)
to 0,
Serial I/O mode select bits
0 0 0 : Serial I/O mode is invalid.
0 0 1 :
dd pari
t
y select bit
0 :
ct
bit
0 :
2 1 0
5
6
Even/O
Parity enable sele
Serial I/O mode select bits
0 0 0 : Serial I/O is invalid.
0 0 1 :
2 1 0
5
6
Odd/Even parity select bit
0:
Parity enable bit
0:
Page 66,
Fig. 68,
UA
RT0/1
sm
it/r
e
rol register
tr
an
nt
ceive
co
0,
bit 6
6
CLK polar
0 :
At
ity
al
sel
ling
ect
bit
, receive data
the f
i
s
i
nput.
CPL
6
CLK polarity select bit
0 : At the falling , receive data is input.
When not in transfer, pin CLK’s level
is “H”.
CPL
Page 68,
Left column,
Last
l
ine
read out the RTS
k
output turns back to “L”.
read out the RTS
k
output turns back to “L”.
Page 70,
Fig. 71
I
CLK
porarity
se
lect
bi
t
= 1
I
CLK porarity select bit = 0
I
CLK
porarity
se
lect
bi
t
= 0
I
CLK porarity select bit = 1
Page 74,
Table 13
Pin P8
0
/CTS
0
/RTS
0
(Note 1)
CTS
2
Functions
Pin P8
1
/
P8
1
or CLK
0
Pin P8
0
/CTS
0
/RTS
0
(Note 1)
CTS
0
Functions
Pin P8
1
/
P8
1
or CLK
0
#
Page 77,
Left column,
Line 12
AD
T
RG
inp
ut
changes from
“H”
to “
L” (
or “
L” t
o “H”.
)
AD
T
RG
inp
ut
changes from
“H”
to “
L” (
or “
L” t
o “H”.
)
Page 77,
t column,
Line 14
L
e
f
AD
T
RG
pin
i
s
multipl
exed with an
a
nalog voltage
AD
T
RG
pin
i
s
multipl
exed with an
a
nalog voltage
Page 76,
Fig. 77
Ladder
n
et
w
or
k
Resistor ladder network
#
Page 77,
t column,
Lines 5 to 6
Page 77,
g
h
t column,
Line 10
Page 80,
L
e
f
t column,
Line 10
R
i
g
h
the ladder network
or not
the r
esi
st
o
r
ladder network
or not
#
R
i
the ladder net
network
w
or
k can be cut
off by disconnecting ladd
er
the r
ing resistor
esi
st
or ladder net
la
dder
w
or
k can be cut
o
f
f by disconnect-
network
#
, the cor
respondin
g
pi
n (
DA
0
t
o DA
2
)
outputs
, the cor
respondin
g
pi
n (
D-A
0
to D-A
2
)
ou
t
puts
#
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