
Table 24.5
Port P7 Peripheral Function Input/Output Control
PS1 Register
PSL1 Register
PSC Register
PSD1 Register
PSE1 Register
Bit 0
0: P7_0/
TA0OUT input/
SRXD2 input/
IIO1_6 input/
SDA2 input
1: Select by the
PSL1_0 bit
0: Select by the
PSC_0 bit
1: TA0OUT output
0: TXD2 output/
SDA2 output
1: Select by the
PSD1_0 bit
0: Do not set to
this value
1: IIO1_6 output
Set to 0
Bit 1
0: P7_1/
TB5IN input/
TA0IN input/
RXD2 input/
IIO1_7 input/
SCL2 input
1: Select by the
PSL1_1 bit
0: Select by the
PSC_1 bit
1: STXD2 output
0: SCL2 output
1: Select by the
PSD1_1 bit
0: Do not set to
this value
1: IIO1_7 output
Set to 0
Bit 2
0: P7_2/TA1OUT
input/CLK2 input
1: Select by the
PSL1_2 bit
0: Select by the
PSC_2 bit
1: TA1OUT output
0: CLK2 output
1: V output
Set to 0
Bit 3
0: P7_3/
TA1IN input/
CTS2 input/
SS2 input/
IIO1_0 input
1: Select by the
PSL1_3 bit
0: Select by the
PSC_3 bit
1: V output
0: RTS2 output
1: Select by the
PSD1_3 bit
0: IIO1_0 output
1: Do not set to
this value
Set to 0
Bit 4
0: P7_4/
IIO1_1 input/
TA2OUT input
1: Select by the
PSL1_4 bit
0: Select by the
PSC_4 bit
1: W output
0: TA2OUT output
1: Select by the
PSD1_4 bit
0: IIO1_1 output
1: Select by the
PSE1_4 bit
0: TXD6 output
1: Do not set to
this value
Bit 5
0: P7_5/
TA2IN input/
IIO1_2 input/
RXD6 input
1: Select by the
PSL1_5 bit
0: W output
1: Select by the
PSC_5 bit
0: IIO1_2 output
1: Do not set to
this value
Set to 0
Bit 6
0: P7_6/
IIO1_3input/
TA3OUT input/
UD0A input/
UD1A input
1: Select by the
PSL1_6 bit
0: Select by the
PSC_6 bit
1: TA3OUT output
0: Select by the
PSD1_6 bit
1: CAN0OUT output
0: Do not set to
this value
1: Selected by the
PSE1_6 bit
0: IIO1_3 output
1: TXD5 output
Bit 7
0: P7_7/
TA3IN input/
CAN0IN input/
IIO1_4 input/
CLK5 input/
UD0B input/
UD1B input
1: Select by the
PSL1_7 bit
0: Do not set to
this value
1: Select by the
PSD1_7 bit
0: IIO1_4 output
1: Select by the
PSE1_7 bit
0: CLK5 output
1: Do not set to
this value