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參數(shù)資料
| 型號(hào)： | BX80532KC2800D |
| 廠商： | INTEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 2800 MHz, MICROPROCESSOR |
| 文件頁(yè)數(shù)： | 11/129頁(yè) |
| 文件大?。?/td> | 1640K |
| 代理商： | BX80532KC2800D |
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Intel Xeon Processor with 512 KB L2 Cache
108
Datasheet
reading) is stored. These circuits compare the single byte result against programmable threshold
bytes. If enabled, the alert signal on the processor SMBus (SM_ALERT#) will be asserted when
the sensor detects that either threshold is reached or crossed. Analysis of SMBus thermal sensor
data may be useful in detecting changes in the system environment that may require attention.
During manufacturing, the thermal reference byte (TRB) is programmed into the Processor
Information ROM. The thermal reference byte represents the approximate thermal byte reading
that is obtained when the processor is operating at its maximum specified TCASE. The TRB is
derived for each individual processor during Intel’s manufacturing process.
The processor SMBus thermal sensor and thermal reference byte may be used to monitor long term
temperature trends, but can not be used to manage the short term temperature of the processor or
predict the activation of the thermal control circuit. As mentioned earlier, the processors high
thermal ramp rates make this infeasible. Refer to the Intel XeonTM Processor Family Thermal
Design Guidelines for more details.
The SMBus thermal sensor feature in the processor cannot be used to measure TCASE. The TCASE
specification in Chapter 6.0 must be met regardless of the reading of the processor's thermal sensor
in order to ensure adequate cooling for the processor. The SMBus thermal sensor feature is only
available while VCC and SM_VCC are at valid levels and the processor is not in a low-power state.
7.4.5
Thermal Sensor Supported SMBus Transactions
The thermal sensor responds to five of the SMBus packet types: Write Byte, Read Byte, Send Byte,
Receive Byte, and Alert Response Address (ARA). The Send Byte packet is used for sending one-
shot commands only. The Receive Byte packet accesses the register commanded by the last Read
Byte packet and can be used to continuously read from a register. If a Receive Byte packet was
preceded by a Write Byte or send Byte packet more recently than a Read Byte packet, then the
‘S’ represents the SMBus start bit, ‘P’ represents a stop bit, ‘Ack’ represents an acknowledge, and
‘///’ represents a negative acknowledge (NACK). The shaded bits are transmitted by the thermal
sensor, and the bits that aren’t shaded are transmitted by the SMBus host controller. Table 51 shows
the encoding of the command byte.
Table 47. Write Byte SMBus Packet
Table 48. Read Byte SMBus Packet
S
Slave
Address
Write
Ack
Comman
d Code
Ack
Data
Ack
P
17-bits
1
18-bits
11
S
Slave
Addres
s
Write
Ack
Comman
d Code
Ack
S
Slave
Addres
s
Rea
d
Ack
Data
///
P
17-bits
1
18-bits
11
7-bits
1
8-
bits
11
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| BKT-146-01-F-V | 92 CONTACT(S), MALE, STRAIGHT TWO PART BOARD CONNECTOR, SURFACE MOUNT |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| BX80532KC2800DU | 制造商:Intel 功能描述:MPU XEON PROCESSOR NETBURST 64-BIT 0.13UM 2.8GHZ - Boxed Product (Development Kits) |
| BX80532KC2800F | 制造商:Intel 功能描述:MPU XEON PROCESSOR NETBURST 64-BIT 0.13UM 2.8GHZ - Boxed Product (Development Kits) |
| BX80532KC3000D | 制造商:Intel 功能描述:MPU XEON PROCESSOR NETBURST 64-BIT 0.13UM 3GHZ - Boxed Product (Development Kits) |
| BX80532KC3000H | 制造商:Intel 功能描述:MPU XEON NETBURST 64-BIT 0.13UM 3GHZ - Boxed Product (Development Kits) |
| BX80532KE2000D | 制造商:Intel 功能描述:MPU XEON PROCESSOR NETBURST 64-BIT 0.13UM 2GHZ - Boxed Product (Development Kits) |
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