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TMS320F28335, TMS320F28334, TMS320F28332
Digital Signal Controllers (DSCs)
SPRS439B–JUNE 2007–REVISED OCTOBER 2007
List of Tables
2-1
Hardware Features
...............................................................................................................
13
Signal Descriptions
...............................................................................................................
23
Addresses of Flash Sectors in F28335
.........................................................................................
37
Addresses of Flash Sectors in F28334
.........................................................................................
37
Addresses of Flash Sectors in F28332
.........................................................................................
37
Handling Security Code Locations
..............................................................................................
38
Wait-states
.........................................................................................................................
39
Boot Mode Selection
..............................................................................................................
42
Peripheral Frame 0 Registers
..................................................................................................
46
Peripheral Frame 1 Registers
...................................................................................................
47
Peripheral Frame 2 Registers
...................................................................................................
47
Peripheral Frame 3 Registers
...................................................................................................
47
Device Emulation Registers
.....................................................................................................
48
PIE Peripheral Interrupts
........................................................................................................
51
PIE Configuration and Control Registers
......................................................................................
52
External Interrupt Registers
......................................................................................................
53
PLL, Clocking, Watchdog, and Low-Power Mode Registers
................................................................
55
PLLCR Bit Descriptions
..........................................................................................................
57
CLKIN Divide Options
............................................................................................................
57
Possible PLL Configuration Modes
.............................................................................................
57
Low-Power Modes
................................................................................................................
59
CPU-Timers 0, 1, 2 Configuration and Control Registers
...................................................................
63
ePWM Control and Status Registers
...........................................................................................
65
eCAP Control and Status Registers
............................................................................................
68
eQEP Control and Status Registers
............................................................................................
70
ADC Registers
.....................................................................................................................
74
McBSP Register Summary
......................................................................................................
78
3.3-V eCAN Transceivers
.......................................................................................................
80
CAN Register Map
...............................................................................................................
83
SCI-A Registers
..................................................................................................................
85
SCI-B Registers
..................................................................................................................
85
SCI-C Registers
..................................................................................................................
86
SPI-A Registers
...................................................................................................................
89
I2C-A Registers
....................................................................................................................
92
GPIO Registers
...................................................................................................................
94
GPIO-A Mux Peripheral Selection Matrix
.....................................................................................
95
GPIO-B Mux Peripheral Selection Matrix
.....................................................................................
96
GPIO-C Mux Peripheral Selection Matrix
.....................................................................................
97
XINTF Configuration and Control Register Mapping
........................................................................
100
2-2
3-1
3-2
3-3
3-4
3-5
3-6
3-7
3-8
3-9
3-10
3-11
3-12
3-13
3-14
3-15
3-16
3-17
3-18
3-19
4-1
4-2
4-3
4-4
4-5
4-6
4-7
4-8
4-9
4-10
4-11
4-12
4-13
4-14
4-15
4-16
4-17
4-18
List of Tables
7