參數資料
型號: TMS320F28335_1
廠商: Texas Instruments, Inc.
英文描述: Variable Capacitance Diode for TV Tuner VHF Tuning; Ratings VR (V): 32; Characteristics n: 12.0 min; Characteristics rs (ohm) max: 0.85; Characteristics C (pF) max: C2 = 32.2 to 37.5 C25 = 2.57 to 3.0; Characteristics CVR/CVR: 2/25; Cl: 2.777; Package: UFP
中文描述: 數字信號控制器(DSC)
文件頁數: 114/166頁
文件大?。?/td> 1889K
代理商: TMS320F28335_1
www.ti.com
A
6.6
Timing Parameter Symbology
6.6.1
General Notes on Timing Parameters
6.6.2
Test Load Circuit
Transmission Line
4.0 pF
1.85 pF
Z0 = 50
(Α)
Tester Pin Electronics
Data Sheet Timing Reference Point
Output
Under
Test
42
3.5 nH
Device Pin
(B)
6.6.3
Device Clock Table
TMS320F28335, TMS320F28334, TMS320F28332
Digital Signal Controllers (DSCs)
SPRS439B–JUNE 2007–REVISED OCTOBER 2007
Timing parameter symbols used are created in accordance with JEDEC Standard 100. To shorten the
symbols, some of the pin names and other related terminology have been abbreviated as follows:
Lowercase subscripts and their
meanings:
a
access time
c
cycle time (period)
d
delay time
f
fall time
h
hold time
r
rise time
su
setup time
t
transition time
v
valid time
w
pulse duration (width)
Letters and symbols and their
meanings:
H
High
L
Low
V
Valid
X
Unknown, changing, or don't care level
Z
High impedance
All output signals from the 28x devices (including XCLKOUT) are derived from an internal clock such that
all output transitions for a given half-cycle occur with a minimum of skewing relative to each other.
The signal combinations shown in the following timing diagrams may not necessarily represent actual
cycles. For actual cycle examples, see the appropriate cycle description section of this document.
This test load circuit is used to measure all switching characteristics provided in this document.
A.
Input requirements in this data sheet are tested with an input slew rate of < 4 Volts per nanosecond (4 V/ns) at the
device pin.
The data sheet provides timing at the device pin. For output timing analysis, the tester pin electronics and its
transmission line effects must be taken into account. A transmission line with a delay of 2 ns or longer can be used to
produce the desired transmission line effect. The transmission line is intended as a load only. It is not necessary to
add or subtract the transmission line delay (2 ns or longer) from the data sheet timing.
B.
Figure 6-4. 3.3-V Test Load Circuit
This section provides the timing requirements and switching characteristics for the various clock options
available on the F2833x DSPs.
Table 6-5
and
Table 6-6
list the cycle times of various clocks.
Electrical Specifications
114
Submit Documentation Feedback
相關PDF資料
PDF描述
TMS4024 9 X 64 DIGITAL STORAGE BUFFER (FIFO)
TMS4024JC 9 X 64 DIGITAL STORAGE BUFFER (FIFO)
TMS4024NC 9 X 64 DIGITAL STORAGE BUFFER (FIFO)
TMS4256-15SDE 262,144-BIT DYNAMIC RANDOM-ACCESS MEMORIES
TMS4257-15SDE 262,144-BIT DYNAMIC RANDOM-ACCESS MEMORIES
相關代理商/技術參數
參數描述
TMS320F28335PGFA 功能描述:數字信號處理器和控制器 - DSP, DSC Digital Signal Controller RoHS:否 制造商:Microchip Technology 核心:dsPIC 數據總線寬度:16 bit 程序存儲器大小:16 KB 數據 RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數量:35 定時器數量:3 設備每秒兆指令數:50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT
TMS320F28335PGFA 制造商:Texas Instruments 功能描述:IC DSC 32BIT 512KB 150MHZ 1.995V LQFP176
TMS320F28335PTPQ 功能描述:數字信號處理器和控制器 - DSP, DSC Delfino Micrcntrlr RoHS:否 制造商:Microchip Technology 核心:dsPIC 數據總線寬度:16 bit 程序存儲器大小:16 KB 數據 RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數量:35 定時器數量:3 設備每秒兆指令數:50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT
TMS320F28335PTPS 功能描述:數字信號處理器和控制器 - DSP, DSC Delfino Micrcntrlr RoHS:否 制造商:Microchip Technology 核心:dsPIC 數據總線寬度:16 bit 程序存儲器大小:16 KB 數據 RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數量:35 定時器數量:3 設備每秒兆指令數:50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT
TMS320F28335ZHHA 功能描述:數字信號處理器和控制器 - DSP, DSC Digital Signal Controller RoHS:否 制造商:Microchip Technology 核心:dsPIC 數據總線寬度:16 bit 程序存儲器大小:16 KB 數據 RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數量:35 定時器數量:3 設備每秒兆指令數:50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT