參數(shù)資料
型號： MC145574
廠商： Motorola, Inc.
英文描述： ISDN S/T-Interface Transceiver
中文描述： 綜合業(yè)務數(shù)字網(wǎng)S / T的接口收發(fā)器
文件頁數(shù)： 71/164頁
文件大?。?/td> 1072K
代理商： MC145574
MC145574
8–3
MOTOROLA
This register is a read only register and can be reset by application of either a hardware or software
reset. A per–bit description of nibble register 1 (NR1) follows.
b3
b2
b1
b0
NR1
Activation Indication
Error Indication
NT: Not Applicable
TE: Multiframing
Detection
Frame Sync
ro
ro
ro
ro
NR1(3) — Activation Indication (AI)
This bit is set by the MC145574 when the loop is fully activated. Thus, when the MC145574 is config-
ured as an NT, this bit is set when it is transmitting INFO 4 and receiving INFO 3. Conversely, when
the MC145574 is configured as a TE, this bit is set when it is transmitting INFO 3 and receiving INFO
4. Note that NR1(3) is a read only bit.
NR1(2) — Error Indication (EI)
NR1(2) is set by the MC145574 S/T transceiver to indicate an error condition has been detected by
the activation state machine of the transceiver, as outlined in CCITT I.430, ETSI ETS 300012, and
ANSI T1.605. The low–to–high level transition of the EI bit corresponds to the EI1 error indication
reporting, while the high–to–low level transition of the EI bit corresponds to the EI2 error indication
reporting recovery. Note that NR1(2) is a read only bit.
NR1(1) — NT: Not Applicable
TE: Multiframing Detection (MD)
In the TE mode of operation, this bit is set by the MC145574 S/T transceiver whenever it detects
multiframing from the NT. This bit will be set low if multiframing synchronization is lost and will return
high when synchronization is re–acquired. This bit applies only to TE–configured devices. Note that
NR1(1) is a read only bit.
NR1(0) — Frame Sync (FS)
NR1(0) is set high by the MC145574 S/T transceiver when frame synchronization is achieved. NR1(0)
is reset by the MC145574 whenever frame synchronization is lost. Note that NR1(0) is a read only
bit.
This register is a read/write register and can be cleared by application of either a hardware or software
reset. A per–bit description of nibble register 2 (NR2) is as follows.
b3
b2
b1
b0
NR2
Activation Request
NT: Deactivate Request
TE: Not Applicable
Activation Timer
Expired
NT: NT Terminal Class
TE: Class
rw
rw
rw
rw
NR2(3) — Activation Request (AR)
When NR2(3) is set to 1, an activation request input is passed to the activate state machine within
the MC145574 S/T transceiver, as outlined in CCITT I.430, ETSI ETS 300012, and ANSI T1.605.
If the transceiver is in the idle state (i.e., transmitting and receiving INFO 0) and is configured as an
NT, then AR causes INFO 2 to be sent out on the transmit side of the S/T–interface. Alternatively,
if the chip is configured as a TE and is in the idle state, then writing a 1 to NR2(3) causes INFO 1
to be sent out. Note that this bit will be returned low by the MC145574 S/T transceiver after its active
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
相關PDF資料
PDF描述
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相關代理商/技術參數(shù)
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MC145574AACR2 功能描述:IC TRANSCEIVER ISDN 32-LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:- 標準包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:16-SOIC 包裝:帶卷 (TR)
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MC145574ADWR2 功能描述:IC TRANSCEIVER ISDN 28-SOIC RoHS:否 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:- 標準包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:16-SOIC 包裝:帶卷 (TR)
MC145574AEG 制造商:Freescale Semiconductor 功能描述:
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