參數(shù)資料
型號: MC145574
廠商: Motorola, Inc.
英文描述: ISDN S/T-Interface Transceiver
中文描述: 綜合業(yè)務(wù)數(shù)字網(wǎng)S / T的接口收發(fā)器
文件頁數(shù): 121/164頁
文件大小: 1072K
代理商: MC145574
MC145574
17–1
MOTOROLA
The MC145574 operates from a 5 V
±
5% supply. The MC145574 has an on–chip linear regulator.
This regulator has an output of 3.2 V. This regulated 3 V supply powers all of the internal digital logic,
resulting in reduced power consumption. The analog receiver/transmitter blocks are powered from
the 5 V supply.
The 3 V regulated output is present on the VDD3 pin. A capacitor of 100 nF should be connected
between this pin and VSS to provide filtering for the internal regulator.
If a more efficient 3 V supply is available in the application circuit, then the VDD3 pin can be driven
directly with this external supply. The internal 3 V regulator should then be disabled via the SCP to
gain a further improvement in device power consumption. This can be achieved by setting OR7(7).
The 5 V supply is still required when an external 3 V supply is being used.
The digital output drivers have a separate +ve supply pin, VDD I/O. This pin should be connected to
VDD5 if 5 V output drivers are required, or the VDD3 pin if 3 V output drivers are required. This option
allows the device to be easily interfaced to 3 V or 5 V CMOS or TTL devices. Using 3 V drivers will
give reduced power consumption while still being able to interface to 3 V CMOS and TTL devices.
All the digital inputs operate from the 3 V regulated supply (VDD3) and are TTL and CMOS compatible.
The input ESD protection is connected to VDD5 (the 5 V supply) ensuring that the inputs are compatible
with 3 V or 5 V CMOS and TTL input levels.
The 15.36 MHz crystal oscillator is powered from the 3 V regulated supply (VDD3) to minimize its
power consumption. The XTAL oscillator circuit can be disabled via the SCP control bit (OR8(5)) if
an external 15.36 MHz clock source is available, further improving power consumption.
The MC145574 has four distinct modes in which the maximum power consumption of the device is
specified.
!
In this mode, the device is free to operate and activate or be activated from the S/T–interface.
In this mode, the device consumes the maximum power when it is forced to transmit the 96 kHz test
signal into the correctly terminated (50
) interface circuit. The receiver should also be receiving a
96 kHz test signal.
! ""
In this mode, the device has its transmit circuitry powered down. This is achieved by setting the NR0(2)
in the SCP. The receiver is still fully active and able to respond to S/T–interface initiated activation.
The power consumption is measured with RxINFO = INFO 0. This mode can be entered or exited
in SCP or GCI mode.
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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