參數(shù)資料
型號： MC145574
廠商： Motorola, Inc.
英文描述： ISDN S/T-Interface Transceiver
中文描述： 綜合業(yè)務(wù)數(shù)字網(wǎng)S / T的接口收發(fā)器
文件頁數(shù)： 25/164頁
文件大小： 1072K
代理商： MC145574
MC145574
3–3
MOTOROLA
CCITT I.430, ETSI ETS 300012, and ANSI T1.605 specifications dictate that only an NT can deactivate
the S/T loop. Intuitively, this has to be the case because in a passive bus if one TE sends INFO 0,
seeking to deactivate the loop, the other TE’s INFO 3 simply overrides it.
An NT transmits INFO 0 to the TE(s) when it wishes to deactivate the S/T loop. This is done by setting
NR2(2) (Deactivation Request) to a 1. Note that this bit is internally reset to 0 after the internal activation
state machine has recognized its active transition.
When the MC145574 is configured as an NT, NR5(3:2) corresponds to “IDLE B1 channel on S/T loop”,
and “IDLE B2 channel on S/T loop”, respectively. The device comes out of a hardware or software
reset with these two bits reset to 0. Thus, the NT comes out of reset with the B1 and B2 channels
enabled. When the NT is transmitting INFO 4, data on the B1 and B2 IDL2 timeslots will be modulated
onto the S/T loop. Setting either of these nibble bits in the NT mode will idle the corresponding B
channel on the S/T loop. Note that putting a B channel in the idle mode affects only the transmitted
B channel. The demodulated B data is still transmitted out on IDL2 Tx, in accordance with the IDL2
specification.
When the MC145574 is configured as a TE, NR5(3:2) corresponds to “ENABLE B1 channel on S/T
loop,” and “ENABLE B2 channel on S/T loop,” respectively. The device comes out of a hardware or
software reset with these two bits reset to 0. Thus, the TE comes out of reset with the B1 and B2
channels disabled. When the TE is transmitting INFO 3, data on the B1 and B2 IDL2 timeslots is not
modulated onto the S/T loop. Setting either of these bits enables the modulation of the corresponding
B channel onto the S/T loop.
Note that although the TE comes out of reset with both B channels in the idle mode, this only affects
the modulation path. Demodulated data is still transmitted on Dout.
"$"#
For conformance qualification procedures, it is often necessary to state the values of M and N, where:
M is the number of successive good S0 frames for frame synchronization, and
N is the number of successive bad S0 frames for frame loss.
For the MC145574, M = 5 and N = 3.
!
The NT demodulates the 2B+D data received from the TE(s). In addition to passing this data onto
the network, the NT echoes the D channel data back to the TE(s) using the echo channel. This echo
channel is monitored by the TEs and used in the D channel contention algorithm. For a detailed descrip-
tion, refer to Section 11.
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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MC145574AACR2 功能描述:IC TRANSCEIVER ISDN 32-LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:- 標準包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR)
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MC145574ADWR2 功能描述:IC TRANSCEIVER ISDN 28-SOIC RoHS:否 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:- 標準包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR)
MC145574AEG 制造商:Freescale Semiconductor 功能描述:
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