參數(shù)資料
型號: MC145574
廠商: Motorola, Inc.
英文描述: ISDN S/T-Interface Transceiver
中文描述: 綜合業(yè)務數(shù)字網(wǎng)S / T的接口收發(fā)器
文件頁數(shù): 105/164頁
文件大?。?/td> 1072K
代理商: MC145574
MC145574
12–3
MOTOROLA
The Q data nibble received from the TE(s) is obtained by reading BR3(7:4). The demodulated Q chan-
nel data is written to this register every 5 ms. BR3(7:4) are read only bits.
Data written to BR2(7:4) is transmitted in the Q channel. The TE–configured MC145574 polls this
internal register once every 5 ms (a multiframe is 5 ms in duration). If no new data has been written
to this register, the old data is re–transmitted. When multiframing is disabled, the data in this register
is ignored and the Fa bit obeys the multiframing wrapping criteria as outlined in CCITT I.430, ETSI
ETS 300012, and ANSI T1.605.
BR2(7:4) comes out of reset in the all–1s state in the TE mode of operation. To accommodate other
TEs on the loop, BR2(7:4) should be left in the all–1s state when the TE does not have access to
the Q channel.
The TE will generate an interrupt either once every multiframe or only in the event of a new SC1 sub-
channel nibble having been received. A new SC1 subchannel nibble is defined as one which differs
from the previous SC1 nibble. Table 12–3 illustrates how to configure a TE for either of these options.
Table 12–3. TE Multiframe Interrupts
BR3(2)
Interrupt Every
Multiframe
NR4(2)
Enable Multiframing
Interrupt
IRQ
MC145574
X
0
Multiframing never causes an interrupt
0
1
An interrupt is generated on the reception of a
new SC1 subchannel nibble
1
1
An interrupt is generated every multiframe
The S subchannel nibbles SC1, SC2, SC3, SC4, and SC5 received from the NT are obtained by reading
BR3(7:4), BR9(7:4), BR9(3:0), BR10(7:4), and BR10(3:0), respectively. The demodulated S subchan-
nel data is written to these registers every 5 ms. These registers are read only registers in the TE
mode of operation.
Multiframing can be enabled in GCI mode by writing/reading to BR7(5) via the Monitor channel.
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
相關(guān)PDF資料
PDF描述
MC14559BDWR2 Successive Approximation Registers
MC14559B Successive Approximation Registers
MC14559BCP Successive Approximation Registers
MC1455 Timing Circuit
MC1455BD Timing Circuit
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC145574AAC 功能描述:IC TRANSCEIVER ISDN 32-LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器,接收器,收發(fā)器 系列:- 標準包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC(0.295",7.50mm 寬) 供應商設備封裝:16-SOIC 包裝:帶卷 (TR)
MC145574AACR2 功能描述:IC TRANSCEIVER ISDN 32-LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器,接收器,收發(fā)器 系列:- 標準包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC(0.295",7.50mm 寬) 供應商設備封裝:16-SOIC 包裝:帶卷 (TR)
MC145574ADW 功能描述:IC TRANSCEIVER ISDN 28-SOIC RoHS:否 類別:集成電路 (IC) >> 接口 - 驅(qū)動器,接收器,收發(fā)器 系列:- 標準包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC(0.295",7.50mm 寬) 供應商設備封裝:16-SOIC 包裝:帶卷 (TR)
MC145574ADWR2 功能描述:IC TRANSCEIVER ISDN 28-SOIC RoHS:否 類別:集成電路 (IC) >> 接口 - 驅(qū)動器,接收器,收發(fā)器 系列:- 標準包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC(0.295",7.50mm 寬) 供應商設備封裝:16-SOIC 包裝:帶卷 (TR)
MC145574AEG 制造商:Freescale Semiconductor 功能描述: