參數(shù)資料
型號(hào)： MAX1359BCTL-T
廠商： MAXIM INTEGRATED PRODUCTS INC
元件分類： 模擬信號(hào)調(diào)理
英文描述： SPECIALTY ANALOG CIRCUIT, QCC40
封裝： 6 X 6 MM, 0.80 MM HEIGHT, MO220, TQFN-40
文件頁(yè)數(shù)： 50/74頁(yè)
文件大?。?/td> 1214K
代理商： MAX1359BCTL-T
MAX1358/MAX1359/MAX1360
16-Bit Data-Acquisition Systems with ADC, DACs,
UPIOs, RTC, Voltage Monitors, and Temp Sensor
54
______________________________________________________________________________________
MODE
UP4MD<3:0>, UP3MD<3:0>,
UP2MD<3:0>, UP1MD<3:0>
MAX1358
MAX1359
MAX1360
DESCRIPTION
0000
GPI
General-purpose digital input. Active edges detected
by UPR_ or UPF_ status register bits. ALH_ has no
effect with this setting.
0001
GPO
General-purpose digital output. Logic level set by LL_
bit. ALH_ has no effect with this setting.
0010
SWA or
SWA SWA or SWA
X
Digital input. DAC A buffer switch control. See the SWA
bit description in the SW_CTRL Register section.
0011
SWB or
SWB
XX
Digital input. DAC B buffer switch control. See the SWB
bit description in the SW_CTRL Register section.
0100
SPDT1 or
SPDT1
SPDT1 or
SPDT1
SPDT1 or
SPDT1
Digital input. SPDT1 switch control. See the SPDT1<1:0>
bit description in the SW_CTRL Register section.
0101
SPDT2 or
SPDT2
SPDT2 or
SPDT2
SPDT2 or
SPDT2
Digital input. SPDT2 switch control. See the SPDT2<1:0>
bit description in the SW_CTRL Register section.
0110
SLEEP or
SLEEP
SLEEP or
SLEEP
SLEEP or
SLEEP
Sleep-mode digital input. Overrides power-control
register and puts the part into sleep mode when
asserted. When deasserted, power mode is determined
by the SHDN bit.
0111
WU or
WU
WU or
WU
WU or
WU
Wake-up digital input. Asserted edge clears SHDN bit.
1000
1001
1010
Reserved
Reserved. Do not use these settings.
1011
PWM or
PWM
PWM or
PWM
PWM or
PWM
PWM digital output. Signal defined by the PWM_CTRL
register. PWM on (or high or “1”); assertion level defined
by the ALH_ bit. When PWM is disabled (PWME = 0),
the UPIO pin idles high (DVDD or CPOUT) if ALH = 1,
and low (DGND) if ALH = 0.
1100
SHDN or
SHDN
SHDN or
SHDN
SHDN or
SHDN
Power-supply shutdown digital output. Equivalent to
SHDN bit. Power-on default of GPI with pullup ensures
initial power-supply turn-on when UPIO is connected to
a power supply with a
SHDN input.
1101
AL_DAY or
AL_DAY
AL_DAY or
AL_DAY
AL_DAY or
AL_DAY
RTC alarm digital output. Asserts for time-of-day alarm
events; equivalent to ALD in STATUS register.
1110
Reserved
Reserved. Do not use these settings.
1111
DRDY or
DRDY
DRDY or
DRDY
DRDY or
DRDY
ADC data-ready digital output. Asserts when analog-to-
digital conversion or calibration completes. Not masked
by MADD bit.
Table 16. UPIO Mode Configuration
Note: When multiple UPIO inputs are configured for the same input function, the inputs are OR’ed together.
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