參數(shù)資料
型號(hào)： WEDPNF8M721V-1012BC
元件分類： 存儲(chǔ)器
英文描述： SPECIALTY MEMORY CIRCUIT, PBGA275
封裝： 32 X 25 MM, PLASTIC, BGA-275
文件頁(yè)數(shù)： 17/42頁(yè)
文件大?。?/td> 686K
代理商： WEDPNF8M721V-1012BC
24
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
WEDPNF8M721V-XBX
LEGEND:
X = Don't Care
RA = Address of the memory location to be read.
RD = Data read from location RA during read operation.
PA = Address of the memory location to be programmed. Addresses are latched on the falling edge of the FWE or FCS pulse, whichever occurs first.
PD = Data to be programmed at location PA. Data is latched on the rising edge of FWE or FCS pulse, whichever occurs first.
SA = Address of the sector to be erased. The combination of FA18-12 will uniquely select any sector.
NOTES:
1. Bus operations are defined in Table 3.
2. All values are in hexadecimal.
3. Except when reading array or autoselect data, all bus cycles are write operations.
4. Address bits FA18-11 = don’t care for unlock and command cycles, unless PA or SA is required.
5. No unlock or command cycles required when reading array data.
6. The Reset command is required to return to reading array data when device is in the autoselect mode, or if FD5 goes high (while the device is providing status data).
7. The fourth cycle of the autoselect command sequence is a read cycle.
8. The data is 00h for an unprotected sector and 01h for a protected sector.
9. The Unlock Bypass command is required prior to the Unlock Bypass Program command.
10. The Unlock Bypass Reset command is required to return to reading array data when the device is in the Unlock Bypass mode.
11. The system may read and program in non-erasing sectors, or enter the autoselect mode, when in the Erase Suspend mode. The Erase Suspend command is valid only
during a sector erase operation.
12. The Erase Resume command is valid only during the Erase Suspend mode.
13. Data bots FD8-15 are don’t cares for unlock and command cycles.
TABLE 7 - COMMAND DEFINITIONS
Bus Cycles (Notes 2, 3, 4, 13)
First Bus
Second Bus
Third Bus
Fourth Bus
Fifth Bus
Sixth Bus
Cycle
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Read (Note 5)
1
RA
RD
Reset (Note 6)
1
XXX
F0
Byte
4
AAA
AA
555
55
AAA
90
X02
5B
Word
555
2AA
555
X01
225B
Byte
4
AAA
AA
555
55
AAA
90
(SA)
XX00
X04
01
Word
555
2AA
555
(SA)
XX00
X02
XX01
Program
Byte
4
AAA
AA
555
55
AAA
A0
PA
PD
Word
555
2AA
555
Unlock Bypass
Byte
3
AAA
AA
555
55
AAA
20
Word
555
2AA
555
Unlock Bypass Program (Note 9)
2
XXX
A0
PA
PD
Unlock Bypass Reset (Note10)2
XXX
90
PA
00
Chip Erase
Byte
6
AAA
AA
555
55
AAA
80
AAA
AA
555
55
AAA
10
Word
555
2AA
555
2AA
555
Sector Erase
Byte
6
AAA
AA
555
55
AAA
80
AAA
AA
555
55
SA
30
Word
555
2AA
555
2AA
Erase Suspended (Note 11)
1
XXX
B0
Erase Resume (Note 12)
1
XXX
30
Bus
Write
Cycles
Req'd
Command
Sequence
(Note 1)
Device ID,
Bottom Boot Block
Sector Protect
Verify (Note 7,8)
Autoselect
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