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CHAPTER 13
SERIAL INTERFACE SIO0
User’s Manual U12790EJ2V0UD
Table 13-2. Serial Interface SIO0 Interrupt Request Signal Generation
Serial Transfer mode
BSYE WUP WAT1 WAT0 ACKE
Description
I2C bus mode (transmit)
00100
An interrupt request signal is generated each time 8 serial clocks
are counted (8-clock wait).
Normally, during transmission, the settings WAT21, WAT0=1, 0,
are not used. They are used only when wanting to coordinate the
receive time and processing systematically using software. ACK
information is generated by the receiving side, thus ACKE should
be set to 0 (disabled).
1
0
An interrupt request signal is generated each time 9 serial clocks
are counted (9-clock wait).
ACK information is generated by the receiving side, thus ACKE
should be set to 0 (disabled).
Other than above
Setting prohibited
I2C bus mode (receive)
10100
An interrupt request signal is generated each time 8 serial clocks
are counted (8-clock wait).
ACK information is output by manipulating ACKT by software after
an interrupt is generated.
1
0/1
An interrupt request signal is generated each time 9 serial clocks
are counted (9-clock wait).
To automatically generate ACK information, preset ACKE to 1
before transfer start. However, in the case of the master, set ACKE
to 0 (disabled) before receiving the last data.
11111
After address is received, if the values of serial I/O shift register
0 (SI00) and slave address register 0 (SVA0) match, an interrupt
request signal and a stop condition are generated.
To automatically generate ACK information, preset ACKE to 1
(enable) before transfer start.
Other than above
Setting prohibited
Remark
BSYE: Bit 7 of the serial bus interface control register (SBIC)
ACKE: Bit 5 of the serial bus interface control register (SBIC)