
20
User’s Manual U12790EJ2V0UD
LIST OF FIGURES (1/8)
Figure No.
Title
Page
2-1
Pin I/O Circuits ....................................................................................................................................
52
3-1
Memory Map (
PD178076, 178096A) ...............................................................................................
55
3-2
Memory Map (
PD178078, 178098A) ...............................................................................................
56
3-3
Memory Map (
PD178F098) ..............................................................................................................
57
3-4
Correspondence Between Data Memory and Addressing (
PD178076, 178096A) ........................
60
3-5
Correspondence Between Data Memory and Addressing (
PD178078, 178098A) ........................
61
3-6
Correspondence Between Data Memory and Addressing (
PD178F098) ......................................
62
3-7
Configuration of Program Counter .....................................................................................................
63
3-8
Configuration of Program Status Word ..............................................................................................
63
3-9
Configuration of Stack Pointer ...........................................................................................................
65
3-10
Data to Be Saved to Stack Memory ...................................................................................................
66
3-11
Data to Be Restored from Stack Memory ..........................................................................................
67
3-12
General-purpose Register Configuration ...........................................................................................
69
4-1
Port Types ...........................................................................................................................................
88
4-2
Block Diagram of P00 to P07 .............................................................................................................
91
4-3
Block Diagram of P10 to P17 .............................................................................................................
92
4-4
Block Diagram of P20 to P26 .............................................................................................................
93
4-5
Block Diagram of P27 .........................................................................................................................
94
4-6
Block Diagram of P30 to P37 .............................................................................................................
95
4-7
Block Diagram of P40 to P47 .............................................................................................................
96
4-8
Block Diagram of P50 to P57 .............................................................................................................
97
4-9
Block Diagram of P60 to P67 .............................................................................................................
98
4-10
Block Diagram of P70 to P72, P74, and P75 ....................................................................................
99
4-11
Block Diagram of P73, P76, and P77 ................................................................................................
100
4-12
Block Diagram of P100 .......................................................................................................................
101
4-13
Block Diagram of P101 and P102 ......................................................................................................
102
4-14
Block Diagram of P120 and P121 ......................................................................................................
103
4-15
Block Diagram of P122 to P124 .........................................................................................................
104
4-16
Block Diagram of P130 to P137 .........................................................................................................
105
4-17
Format of Port Mode Registers ..........................................................................................................
108
5-1
Format of DTS System Clock Select Register (DTSCK) ..................................................................
110
5-2
Block Diagram of Clock Generator ....................................................................................................
111
5-3
Format of Processor Clock Control Register .....................................................................................
112
5-4
Format of Oscillation Stabilization Time Select Register (OSTS) ....................................................
113
5-5
External Circuit of System Clock Oscillator .......................................................................................
114
5-6
Examples of Incorrect Connection Resonator ...................................................................................
115
6-1
Block Diagram of 16-Bit Timer/Event Counter 0 ...............................................................................
120
6-2
Format of 16-Bit Timer Mode Control Register 0 (TMC0) ................................................................
125
6-3
Format of Capture/Compare Control Register 0 (CRC0) ..................................................................
126