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P
TMS320DM6437
Digital Media Processor
SPRS345B–NOVEMBER 2006–REVISED MARCH 2007
Table 2-20. VPBE Terminal Functions
SIGNAL
TYPE
(1)
OTHER
(2)(3)
DESCRIPTION
ZWT
NO.
ZDU
NO.
NAME
VIDEO OUT (VPBE)
IPD
DV
DD33
IPD
DV
DD33
IPD
DV
DD33
IPD
DV
DD33
IPD
DV
DD33
IPD
DV
DD33
IPD
DV
DD33
IPD
DV
DD33
IPD
DV
DD33
IPD
DV
DD33
IPD
DV
DD33
IPD
DV
DD33
IPD
DV
DD33
IPD
DV
DD33
IPD
DV
DD33
IPD
DV
DD33
IPD
DV
DD33
IPU
DV
DD33
IPD
DV
DD33
IPD
DV
DD33
IPD
DV
DD33
HSYNC/EM_CS5/
GP[33]
VSYNC/EM_CS4/
GP[32]
This pin is multiplexed between VPBE, EMIFA, and GPIO.
In VPBE mode, this pin is the VPBE Horizontal Sync (I/O/Z).
This pin is multiplexed between VPBE, EMIFA, and GPIO.
In VPBE mode, this pin is the VPBE Vertical Sync (I/O/Z).
This pin is multiplexed between VPBE and GPIO.
In VPBE mode, this pin is the VPBE Clock Output.
This pin is multiplexed between VPBE and GPIO.
In VPBE mode, this pin is the VPBE Clock Input.
This pin is multiplexed between VPBE (VENC), EMIFA, and GPIO.
In VPBE mode, this pin is the video encoder (VENC) output COUT0.
This pin is multiplexed between VPBE(VENC), EMIFA, and GPIO.
In VPBE mode, this pin is the video encoder (VENC) output COUT1.
This pin is multiplexed between VPBE(VENC), EMIFA, and GPIO.
In VPBE mode, this pin is the video encoder (VENC) output COUT2.
This pin is multiplexed between VPBE(VENC), EMIFA, and GPIO.
In VPBE mode, this pin is the video encoder (VENC) output COUT3.
This pin is multiplexed between VPBE(VENC), EMIFA, and GPIO.
In VPBE mode, this pin is the video encoder (VENC) output COUT4.
This pin is multiplexed between VPBE(VENC), EMIFA, and GPIO.
In VPBE mode, this pin is the video encoder (VENC) output COUT5.
This pin is multiplexed between VPBE(VENC), EMIFA, and GPIO.
In VPBE mode, this pin is the video encoder (VENC) output COUT6.
This pin is multiplexed between VPBE (VENC), EMIFA, and GPIO.
In VPBE mode, this pin is the video encoder (VENC) output COUT7.
F19
J22
I/O/Z
E19
H22
I/O/Z
VCLK/GP[31]
D19
G22
I/O/Z
VPBECLK/GP[30]
G19
K22
I/O/Z
COUT0/EM_D[0]/
GP[14]
COUT1/EM_D[1]/
GP[15]
COUT2/EM_D[2]/
GP[16]
COUT3/EM_D[3]/
GP[17]
COUT4/EM_D[4]/
GP[18]
COUT5/EM_D[5]/
GP[19]
COUT6/EM_D[6]/
GP[20]
COUT7/EM_D[7]/
GP[21]
YOUT0/GP[22]/
(BOOTMODE0)
YOUT1/GP[23]/
(BOOTMODE1)
YOUT2/GP[24]/
(BOOTMODE2)
YOUT3/GP[25]/
(BOOTMODE3)
YOUT4/GP[26]/
(FASTBOOT)
D16
E21
I/O/Z
D18
G20
I/O/Z
D17
E22
I/O/Z
E16
F20
I/O/Z
E18
G21
I/O/Z
E17
F22
I/O/Z
F16
F21
I/O/Z
F17
H20
I/O/Z
F18
J20
I/O/Z
F15
K20
I/O/Z
These pins are multiplexed between VPBE (VENC) and GPIO.
After reset, these are video encoder (VENC) outputs 6:0, YOUT[6:0].
G15
L20
I/O/Z
For proper DM6437 device operation, the YOUT6 pin
must
be pulled
down via an external resistor.
For proper DM6437 device operation, the YOUT5 pin
must
be pulled
up via an external resistor.
G16
H21
I/O/Z
G17
K19
I/O/Z
YOUT5/GP[27]
H17
L19
I/O/Z
YOUT6/
GP[28]
YOUT7/
GP[29]
H16
J21
I/O/Z
This pin is multiplexed between VPBE (VENC) and GPIO.
In VPBE mode, this pin is the VENC output 7, YOUT7.
This pin is multiplexed between VPBE, EMIFA, and GPIO.
In VPBE mode, it is the LCD output enable LCD_OE (O/Z).
This pin is multiplexed between VPBE, EMIFA, and GPIO.
In VPBE mode, this pin is the RGB666/888 Green output data bit 0,
G0.
This pin is multiplexed between VPBE, EMIFA, and GPIO.
In VPBE mode, this pin is the RGB666/888 Blue output data bit 0, B0
or LCD interlaced LCD_FIELD (I/O/Z).
H15
K21
I/O/Z
LCD_OE/EM_CS3/
GP[13]
C18
D22
I/O/Z
G0/EM_CS2/
GP[12]
IPD
DV
DD33
C19
C22
I/O/Z
B0/LCD_FIELD/
EM_A[3]/GP[11]
IPD
DV
DD33
B18
D21
I/O/Z
(1)
(2)
I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal
IPD = Internal pulldown, IPU = Internal pullup. For more detailed information on pullup/pulldown resistors and situations where external
pullup/pulldown resistors are required, see
Section 3.9.1
,
Pullup/Pulldown Resistors
.
Specifies the operating I/O supply voltage for each signal
(3)
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