參數(shù)資料
型號： TMS320C6713BGDPA200
廠商： Texas Instruments, Inc.
元件分類： 數(shù)字信號處理
英文描述： FLOATING-POINT DIGITAL SIGNAL PROCESSORS
中文描述： 浮點數(shù)字信號處理器
文件頁數(shù)： 75/150頁
文件大?。?/td> 2039K
代理商： TMS320C6713BGDPA200
TMS320C6713, TMS320C6713B
FLOATING-POINT DIGITAL SIGNAL PROCESSORS
SPRS186I
DECEMBER 2001
REVISED MAY 2004
75
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251
1443
PLL and PLL controller
The TMS320C6713/13B includes a PLL and a flexible PLL Controller peripheral consisting of a prescaler (D0)
and four dividers (OSCDIV1, D1, D2, and D3). The PLL controller is able to generate different clocks for different
parts of the system (i.e., DSP core, Peripheral Data Bus, External Memory Interface, McASP, and other
peripherals). Figure 15 illustrates the PLL, the PLL controller, and the clock generator logic.
CLKIN
CLKOUT3
For Use
in System
/1, /2,
..., /32
ENA
..., /32
ENA
/1, /2,
PLL
x4 to x25
PLLEN (PLL_CSR.[0])
..., /32
ENA
/1, /2,
/1, /2,
..., /32
ENA
/1, /2,
..., /32
ENA
(DSP Core)
SYSCLK1
(Peripherals)
SYSCLK2
ECLKIN
EKSRC Bit
(DEVCFG.[4])
EMIF
Dividers D1 and D2 must never be disabled. Never write a “0” to the D1EN or D2EN bits in the PLLDIV1 and PLLDIV2 registers.
SYSCLK3
CLKMODE0
(EMIF Clock Input)
C6713/13B DSPs
PLLOUT
PLLREF
DIVIDER D0
OSCDIV1
DIVIDER D1
DIVIDER D2
DIVIDER D3
ECLKOUT
AUXCLK
(Internal Clock Source
to McASP0 and McASP1)
1
0
1 0
1
0
PLLHV
C2
C1
EMI filter
+3.3 V
10
μ
F
0.1
μ
F
D0EN (PLLDIV0.[15])
OD1EN (OSCDIV1.[15])
D1EN (PLLDIV1.[15])
D2EN (PLLDIV2.[15])
D3EN (PLLDIV3.[15])
Reserved
NOTES: A. Place all PLL external components (C1, C2, and the EMI Filter) as close to the C67x
DSP device as possible. For the best
performance, TI recommends that all the PLL external components be on a single side of the board without jumpers, switches, or
components other than the ones shown.
B. For reduced PLL jitter, maximize the spacing between switching signals and the PLL external components (C1, C2, and the EMI
Filter).
C. The 3.3-V supply for the EMI filter must be from the same 3.3-V power plane supplying the I/O voltage, DV
DD
.
D. EMI filter manufacturer TDK part number ACF451832-333, -223, -153, -103. Panasonic part number EXCCET103U.
Figure 15. PLL and Clock Generator Logic
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TMS320C6713BGDP-C20 制造商:Texas Instruments 功能描述:
TMS320C6713BPYP167 制造商:TI 功能描述:_
TMS320C6713BPYP200 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC Floating-Pt Dig Sig Processors RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
TMS320C6713BPYP225 制造商:Texas Instruments 功能描述:
TMS320C6713BZDP225 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC Floating-Pt Dig Sig Processors RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
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