參數(shù)資料
型號: TMS320C6713BGDPA200
廠商: Texas Instruments, Inc.
元件分類: 數(shù)字信號處理
英文描述: FLOATING-POINT DIGITAL SIGNAL PROCESSORS
中文描述: 浮點數(shù)字信號處理器
文件頁數(shù): 50/150頁
文件大小: 2039K
代理商: TMS320C6713BGDPA200
TMS320C6713, TMS320C6713B
FLOATING-POINT DIGITAL SIGNAL PROCESSORS
SPRS186I
DECEMBER 2001
REVISED MAY 2004
50
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251
1443
Terminal Functions (Continued)
SIGNAL
NAME
PIN NO.
PYP
TYPE
IPD/
IPU
DESCRIPTION
GDP
EMIF
ASYNCHRONOUS/SYNCHRONOUS MEMORY CONTROL
Y11
I
IPD
External EMIF input clock source
EMIF output clock depends on the EKSRC bit (DEVCFG.[4]) and on EKEN bit
(GBLCTL.[5]).
EKSRC = 0 –
ECLKOUT is based on the internal SYSCLK3 signal
from the clock generator (default).
EKSRC = 1 –
ECLKOUT is based on the the external EMIF input clock
source pin (ECLKIN)
ECLKIN
78
ECLKOUT
77
Y10
O/Z
IPD
EKEN = 0
EKEN = 1
Asynchronous memory read enable/SDRAM column-address strobe/SBSRAM
address strobe
ECLKOUT held low
ECLKOUT enabled to clock (default)
ARE/SDCAS/
SSADS
79
V11
O/Z
IPU
AOE/SDRAS/
SSOE
75
W10
O/Z
IPU
Asynchronous memory output enable/SDRAM row-address strobe/SBSRAM
output enable
AWE/SDWE/
SSWE
83
V12
O/Z
IPU
Asynchronous memory write enable/SDRAM write enable/SBSRAM write
enable
ARDY
56
Y5
I
IPU
Asynchronous memory ready input
EMIF
ADDRESS
EA21
EA20
EA19
EA18
EA17
109
101
100
95
99
U18
Y18
W17
Y16
V16
EA16
EA15
EA14
EA13
EA12
EA11
EA10
EA9
EA8
EA7
EA6
EA5
EA4
EA3
EA2
I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground
IPD = Internal pulldown, IPU = Internal pullup. [These IPD/IPU signal pins feature a 13-k
resistor (approximate) for the IPD or 18-k
resistor
(approximate) for the IPU. An external pullup or pulldown resistor no greater than 4.4 k
and 2.0 k
, respectively, should be used to pull a signal
to the opposite supply rail.]
To maintain signal integrity for the EMIF signals, serial termination resistors should be inserted into all EMIF output signal lines.
92
94
90
91
93
86
76
74
71
70
69
68
64
63
62
Y15
W15
Y14
W14
V14
W13
V10
Y9
V9
Y8
W8
V8
W7
V7
Y6
EMIF external address
Note: EMIF address numbering for the C6713PYP and C6713
B
PYP devices
t t ith EA2 t
i t i i
start with EA2 to maintain signal name compatibility with other C671x devices
(e g C6711 C6713GDP and C6713
(e.g., C6711, C6713GDP, and C6713
B
GDP) [see the 32-bit EMIF addressing
scheme in the
TMS320C6000 DSP External Memory Interface (EMIF)
Reference Guide
(literature number SPRU266)].
tibilit ith th C671 d
O/Z
IPU
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