參數(shù)資料
型號: TMS320C6713BGDPA200
廠商: Texas Instruments, Inc.
元件分類: 數(shù)字信號處理
英文描述: FLOATING-POINT DIGITAL SIGNAL PROCESSORS
中文描述: 浮點數(shù)字信號處理器
文件頁數(shù): 104/150頁
文件大?。?/td> 2039K
代理商: TMS320C6713BGDPA200
TMS320C6713, TMS320C6713B
FLOATING-POINT DIGITAL SIGNAL PROCESSORS
SPRS186I
DECEMBER 2001
REVISED MAY 2004
104
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251
1443
INPUT AND OUTPUT CLOCKS (CONTINUED)
switching characteristics over recommended operating conditions for CLKOUT2
(see Figure 30)
NO.
PARAMETER
PYPA
167
PYP
200
GDPA
200
GDP
225
GDP
300
UNIT
MIN
MAX
1
2
3
4
t
c(CKO2)
t
w(CKO2H)
t
w(CKO2L)
t
t(CKO2)
Cycle time, CLKOUT2
Pulse duration, CLKOUT2 high
Pulse duration, CLKOUT2 low
Transition time, CLKOUT2
C2
0.8
(C2/2)
0.8
(C2/2)
0.8
C2 + 0.8
(C2/2) + 0.8
(C2/2) + 0.8
ns
ns
ns
ns
2
The reference points for the rise and fall transitions are measured at V
OL
MAX and V
OH
MIN.
C2 = CLKOUT2 period in ns. CLKOUT2 period is determined by the PLL controller output SYSCLK2 period, which
must
be set to CPU period
divide-by-2.
CLKOUT2
1
2
3
4
4
Figure 30. CLKOUT2 Timings
switching characteristics over recommended operating conditions for CLKOUT3
§
(see Figure 31)
NO.
PARAMETER
13PYPA
167
13PYP
200
13GDPA
200
13GDP
225
13BPYPA
167
13BPYP
200
13BGDPA
200
13BGDP
225
13BGDP
300
UNIT
MIN
MAX
MIN
MAX
1
2
3
4
t
c(CKO3)
t
w(CKO3H)
t
w(CKO3L)
t
t(CKO3)
t
d(CLKINH-CKO3V)
Cycle time, CLKOUT3
Pulse duration, CLKOUT3 high
Pulse duration, CLKOUT3 low
Transition time, CLKOUT3
C3
0.6
(C3/2)
0.6
(C3/2)
0.6
C3 + 0.6
(C3/2) + 0.6
(C3/2) + 0.6
C3
0.9
(C3/2)
0.9
(C3/2)
0.9
C3 + 0.9
(C3/2) + 0.9
(C3/2) + 0.9
ns
ns
ns
ns
2
3
5
Delay time, CLKIN high to CLKOUT3 valid
1.5
6.5
1.5
7.5
ns
The reference points for the rise and fall transitions are measured at V
OL
MAX and V
OH
MIN.
§
C3 = CLKOUT3 period in ns. CLKOUT3 period is a divide-down of the CPU clock, configurable via the RATIO field in the PLLDIV3 register.
CLKIN
CLKOUT3
NOTE A: For this example, the CLKOUT3 frequency is CLKIN divide-by-2.
3
1
2
4
4
5
5
Figure 31. CLKOUT3 Timings
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