參數(shù)資料
型號(hào)： TMS320C6713BGDPA200
廠商： Texas Instruments, Inc.
元件分類： 數(shù)字信號(hào)處理
英文描述： FLOATING-POINT DIGITAL SIGNAL PROCESSORS
中文描述： 浮點(diǎn)數(shù)字信號(hào)處理器
文件頁數(shù)： 37/150頁
文件大小： 2039K
代理商： TMS320C6713BGDPA200
TMS320C6713, TMS320C6713B
FLOATING-POINT DIGITAL SIGNAL PROCESSORS
SPRS186I
DECEMBER 2001
REVISED MAY 2004
37
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251
1443
Table 23. C6713/13B Device Multiplexed/Shared Pins (Continued)
DESCRIPTION
DEFAULT SETTING
DEFAULT
FUNCTION
MULTIPLEXED PINS
GDP
J20
B14
C14
A15
C15
A16
B16
C16
B17
A18
C19
D20
E20
G19
G18
G20
E19
F18
F20
C17
B18
C20
D18
H20
H19
E18
PYP
135
174
173
172
168
167
166
165
160
164
156
152
147
144
146
143
151
150
145
161
159
154
155
139
140
153
NAME
HINT/GP[1]
HD15/GP[15]
HD14/GP[14]
HD13/GP[13]
HD12/GP[12]
HD11/GP[11]
HD10/GP[10]
HD9/GP[9]
HD8/GP[8]
HD7/GP[3]
HD4/GP[0]
HD1/AXR1[7]
HD0/AXR1[4]
HCNTL1/AXR1[1]
HCNTL0/AXR1[3]
HR/W/AXR1[0]
HDS1/AXR1[6]
HDS2/AXR1[5]
HCS/AXR1[2]
HD6/AHCLKR1
HD5/AHCLKX1
HD3/AMUTE1
HD2/AFSX1
HHWIL/AFSR1
HRDY/ACLKR1
HAS/ACLKX1
B d f
By default, the HPI peripheral pins are
enabled at reset McASP1 peripheral
enabled at reset. McASP1 peripheral
pins and eleven GPIO pins are
disabled.
lt th HPI
i h
l i
To enable the McASP1 peripheral pins
and the eleven GPIO pins, an external
pulldown resistor must be provided on
the HD14 pin setting HPI EN 0 at
the HD14 pin setting HPI_EN = 0 at
reset.
HPI_EN (HD14 pin) = 1
HPI_EN (HD14 pin) 1
(HPI enabled)
HPI pin function
To use these software configurable
To use these software-configurable
GPIO pins, the GPxEN bits in the GP
Enable Register and the GPxDIR bits in
ab e
egs e a d
the GP Direction Register must be
properly configured.
GPxEN = 1:
GP[x] pin enabled
GPxDIR = 0:
GP[x] pin is an input
GPxDIR = 1:
GP[x] pin is an
output
McASP1 pins and eleven
GPIO pins are disabled.
b s
[ ] p
McASP1 pin direction is controlled by
h PDIR[ ] bi i h M ASP PDIR
the PDIR[x] bits in the McASP1PDIR
register.
TINP0/AXR0[3]
17
G2
Timer 0 input
function
McASP0PDIR = 0 (input)
[specifically AXR0[3] bit]
By default, the Timer 0 input pin is
enabled (and a shared input until the
McASP0 peripheral forces an output).
McASP0PDIR = 0 input, = 1 output
By default, the Timer 0 output pin is
enabled.
TOUT0/AXR0[2]
18
G1
Timer 0 output
function
TOUT0SEL = 0
(DEVCFG register bit)
[TOUT0 pin enabled and
McASP0 AXR0[2] pin
disabled]
To enable the McASP0 AXR0[2] pin, the
TOUT0SEL bit in the DEVCFG register
must be set to 1 (disabling the Timer 0
peripheral output pin function).
The AXR2 bit in the McASP0PDIR
register
controls
(input/output) of the AXR0[2] pin
McASP0PDIR = 0 input, = 1 output
the
direction
DEVICE CONFIGURATIONS (CONTINUED)
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TMS320C6713BGDP-C20 制造商:Texas Instruments 功能描述:
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TMS320C6713BPYP225 制造商:Texas Instruments 功能描述:
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