參數(shù)資料
型號: TMS320C6713BGDPA200
廠商: Texas Instruments, Inc.
元件分類: 數(shù)字信號處理
英文描述: FLOATING-POINT DIGITAL SIGNAL PROCESSORS
中文描述: 浮點數(shù)字信號處理器
文件頁數(shù): 32/150頁
文件大?。?/td> 2039K
代理商: TMS320C6713BGDPA200
TMS320C6713, TMS320C6713B
FLOATING-POINT DIGITAL SIGNAL PROCESSORS
SPRS186I
DECEMBER 2001
REVISED MAY 2004
32
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251
1443
DEVICE CONFIGURATIONS (CONTINUED)
peripheral pin selection at device reset
Some C6713/13B peripherals share the same pins (internally muxed) and are mutually exclusive (i.e., HPI,
general-purpose input/output pins GP[15:8, 3, 1, 0] and McASP1).
HPI, McASP1, and GPIO peripherals
The HPI_EN (HD14 pin) is latched at reset. This pin selects whether the HPI peripheral pins or McASP1
peripheral pins and GP[15:8, 3, 1, 0] pins are functionally enabled (see Table 19).
Table 19. HPI_EN (HD14 Pin) Peripheral Selection (HPI or McASP1, and Select GPIO Pins)
PERIPHERAL PIN
SELECTION
PERIPHERAL
PINS SELECTED
DESCRIPTION
HPI_EN
(HD14 Pin) [173, C14]
HPI
McASP1 and
GP[15:8,3,1,0]
0
HPI_EN = 0
HPI pins are disabled; McASP1 peripheral pins and GP[15:8, 3, 1,0] pins
are enabled. All multiplexed HPI/McASP1 and HPI/GPIO pins function as
McASP1 and GPIO pins, respectively. To use the GPIO pins, the
appropriate bits in the GPEN and GPDIR registers need to be
configured.
HPI_EN = 1
HPI pins are enabled; McASP1 peripheral pins and GP[15:8, 3, 1,0] pins
are disabled [default]. All multiplexed HPI/McASP1 and HPI/GPIO pins
function as HPI pins.
1
The HPI_EN (HD[14]) pin
cannot
be controlled via software.
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