- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄383876 > T7256A Compliance with the New ETSI PSD Requirement PDF資料下載
參數(shù)資料
| 型號(hào)： | T7256A |
| 英文描述： | Compliance with the New ETSI PSD Requirement |
| 中文描述： | 符合新的ETSI PSD的要求 |
| 文件頁(yè)數(shù)： | 8/116頁(yè) |
| 文件大?。?/td> | 1056K |
| 代理商： | T7256A |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)當(dāng)前第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)
Data Sheet
January 1998
T7256 Single-Chip NT1 (SCNT1) Transceiver
4
Lucent Technologies Inc.
Table of Contents
(continued)
Tables
Page
Table 1. Pin Descriptions...........................................................................................................................................6
Table 2. U-Interface Bit Assignment ........................................................................................................................13
Table 3. Line Transmission Code.............................................................................................................................18
Table 4. Global Device Control—Device Configuration (Address 00h)....................................................................20
Table 5. Global Device Control—U-Interface (Address 01h) ...................................................................................22
Table 6. Global Device Control—S/T-Interface (Address 02h).................................................................................23
Table 7. Data Flow Control—U and S/T B Channels (Address 03h)........................................................................25
Table 8. Data Flow Control—D Channels and TDM Bus (Address 04h)..................................................................26
Table 9. TDM Bus Timing Control (Address 05h).....................................................................................................27
Table 10. Control Flow State Machine Control—Maintenance/Reserved Bits (Address 06h) .................................28
Table 11. Control Flow State Machine Status (Address 07h) ..................................................................................29
Table 12. Control Flow State Machine Status—Reserved Bits (Address 08h) ........................................................30
Table 13. eoc State Machine Control—Address (Address 09h) ..............................................................................31
Table 14. eoc State Machine Control—Information (Address 0Ah) .........................................................................32
Table 15. eoc State Machine Status—Address (Address 0Bh) ...............................................................................32
Table 16. eoc State Machine Status—Information (Address 0Ch) ..........................................................................32
Table 17. Q-Channel Bits (Address 0Dh).................................................................................................................33
Table 18. S Subchannels 1—5 (Address 0Eh—12h)...............................................................................................33
Table 19. U-Interface Interrupt Register (Address 13h)...........................................................................................34
Table 20. U-Interface Interrupt Mask Register (Address 14h)..................................................................................35
Table 21. S/T-Interface Interrupt Register (Address 15h).........................................................................................36
Table 22. S/T-Interface Interrupt Mask Register (Address 16h)...............................................................................36
Table 23. Maintenance Interrupt Register (Address 17h)........................................................................................37
Table 24. Maintenance Interrupt Mask Register (Address 18h)...............................................................................37
Table 25. Global Interrupt Register (Address 19h) ..................................................................................................38
Table 26. Stand-Alone Mode ...................................................................................................................................45
Table 27. Microprocessor Mode...............................................................................................................................45
Table 28. STLED States ..........................................................................................................................................46
Table 29. T7256 Reference Schematic Parts List....................................................................................................56
Table 30. Line-Side Resistor Requirements ............................................................................................................58
Table 31.
Motorola
MC68302 SCC Options.............................................................................................................62
Table 32. PCM Channel Selection...........................................................................................................................63
Table 33. SPEC_V2 Functions ................................................................................................................................69
Table 34. SPEC_V2 Interface Connector Pinouts....................................................................................................71
Table 35. Power Consumption.................................................................................................................................74
Table 36. Digital dc Characteristics (Over Operating Ranges) ................................................................................74
Table 37. S/T-Interface Receiver Common-Mode Rejection....................................................................................75
Table 38. Fundamental Mode Crystal Characteristics.............................................................................................75
Table 39. Internal PLL Characteristics.....................................................................................................................75
Table 40. TDM Bus Timing.......................................................................................................................................76
Table 41. Clock Timing.............................................................................................................................................77
Table 42. RESET Timing..........................................................................................................................................77
Table 43. Power Dissipation Variation....................................................................................................................101
Table 44. Power Dissipation of CKOUT .................................................................................................................101
Table 45. Power Consumption...............................................................................................................................102
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| T7288 | CEPT/E1 Line Interface(CEPT/E1 線接口) |
| T7290A | DS1/T1/CEPT/E1 Line Interface(DS1/T1/CEPT/E1 線接口) |
| T7295-1 | E3 Integrated Line Receiver(E3 集成線接收器) |
| T7295-6 | DS3/SONET STS-1 Integrated Line Receiver(DS3/SONET STS-1 集成線接收器) |
| T7296 | Integrated Line Transmitter(集成PCM線傳送器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| T7257 | 制造商:TE Connectivity 功能描述: |
| T-726 | 制造商:RHOMBUS-IND 制造商全稱:Rhombus Industries Inc. 功能描述:ADSL Line Interface Transformers |
| T7263 | 制造商:TE Connectivity 功能描述: |
| T7263A | 制造商:Toshiba America Electronic Components 功能描述:T7263A |
| T7264 | 制造商:TE Connectivity 功能描述: |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。