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參數(shù)資料
| 型號(hào)： | T7256A |
| 英文描述： | Compliance with the New ETSI PSD Requirement |
| 中文描述： | 符合新的ETSI PSD的要求 |
| 文件頁(yè)數(shù)： | 48/116頁(yè) |
| 文件大?。?/td> | 1056K |
| 代理商： | T7256A |
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Data Sheet
January 1998
T7256 Single-Chip NT1 (SCNT1) Transceiver
44
Lucent Technologies Inc.
Loopbacks
The figure below shows the Layer-1 loopbacks that are
defined in ITU-T I.430, Appendix I and ANSI Specifica-
tion T1.605, Appendix G. A complete discussion of
these loopbacks is presented in ITU-T I.430, Appendix
I. The T7256 supports loopbacks 2, C, and U. Loop-
back U is not defined in the standards, but is provided
by the T7256 via register GR1, bit 0. Loopback 2 is the
eoc 2B+D loopback defined in the standards.
Individual B-channel eoc loopbacks are looped
upstream of the data flow matrix. Loopback C is sup-
ported via the DFR0 register, bits 4—7.
In a loopback 2, the 2B+D data is looped as close to
the S/T-interface as possible (just short of the S/T-inter-
face device pins). During this loopback, the device
overrides the SXE bit to force all 0s in the echo channel
and also overrides the SXB1, SXB2, SXD, UXB1,
UXB2, and UXD data flow matrix bits to force a U- to
S/T-interface data path. Note that the actual register
bits themselves are unaffected. If AUTOEOC = 0, (reg-
ister GRO, bit 4), these registers must be set up manu-
ally.
5-2482 (C)
Figure 17. Location of the Loopback Configurations (Reference ITU-T I.430 Appendix I)
Loopback
2
3
4
C
B1 or B2
A
Channel(s) Looped
2B+D channels
2B+D channels
B1, B2
B1, B2
2B+D, B1, B2
2B+D, B1, B2
TE1 = ISDN terminal
TE2 = Non-ISDN terminal
TA = Terminal adapter
NT2 = Network termination 2
NT1 = Network termination 1
LT = Line termination
R = R reference point
S = S reference point
T = T reference point
U = U reference point
TE1
S
NT2
NT1
T
U
LT
2
C
U
B1
3
B2
TA
TE2
R
4
S
4
A
A
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