參數(shù)資料
型號: T7256A
英文描述: Compliance with the New ETSI PSD Requirement
中文描述: 符合新的ETSI PSD的要求
文件頁數(shù): 34/116頁
文件大?。?/td> 1056K
代理商: T7256A
Data Sheet
January 1998
T7256 Single-Chip NT1 (SCNT1) Transceiver
30
Lucent Technologies Inc.
Microprocessor Interface Description
(continued)
Registers
(continued)
Table 12. Control Flow State Machine Status—Reserved Bits (Address 08h)
Reg
CFR2
R/W
R
Bit 7
Bit 6
R64R
Bit 5
R54R
Bit 4
R44R
Bit 3
R34R
Bit 2
R25R
Bit 1
R16R
Bit 0
R15R
Register
CFR2
Bit
1—0
Symbol
R[16:15]R
Name/Description
Receive Reserved Bits.
Follows R
1, 5
and R
1, 6
in receive U-interface
data stream.
Receive Reserved Bits.
Follows R
2, 5
in receive U-interface data
stream.
Receive Reserved Bits.
Follows R
3, 4
; R
4, 4
; R
5, 4
; and R
6, 4
in receive U-
interface data stream.
CFR2
2
R25R
CFR2
6—3
R[64:54:44:34]R
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