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1.4 Product Family
Introduction
STDM110
1-8
Samsung ASIC
10. Settling Time
- The time required, following a prescribed data change from
the 50% point of the login input change, for the output of a DAC to reach and to
remain within a given fraction (usually
±
1/2lsb) of the final value. Typical pre-
scribed changes are full scale, 1MSB and 1LSB at a major carry. Settling time of
current-output DACs is quite fast. The major share of settling time of a voltage-
output DAC is usually contributed by the settling time of the output op-amp circuit.
Figure 1-3.
Setting Time
11. Power-Supply Sensitivity
-The sensitivity of a converter to changes in the
power-supply voltages is normally expressed in terms of percent-of-full-scale
change in analog output value (of fractions of 1LSB) for a 1% dc change in the
power supply. Power supply sensitivity may also expressed in relation to a
specified dc shift of supply voltage. A converter may be considered "good" if the
change in reading at full scale does not exceed 1/2LSB for 3% change in power
supply. Even better specs are necessary for converters designed for battery
operation.
12. ILE (integral Linearity Error)
- Linearity error of a converter, expressed in %,
ppm of full-scale range or multiples of 1LSB, is a deviation of the analog values
in a plot of the measured conversion relationship from a straight line. The straight
line can be either a "best straight line" determined empirically by manipulation of
the gain and/or offset to equalize maximum positive and negative deviation of the
actual transfer characteristics from this straight line; or it can be a straight line
passing through the endpoints of the transfer characteristic endpoints of the
transfer characteristic after they have been calibrated (sometimes referred to as
"endpoint" linearity). Endpoint linearity error is similar to relative accuracy error.
For multiplying D/A converters, the analog linearity error, at a specified digital
code, is defined in the same way as for multipliers, by deviation from a "best
straight line" through the plot of the analog output-input response.
13. DLE (Differential Linearity Error)
- Any two adjacent digital codes should re-
sult in measured output values that are exactly 1LSB apart (2-n of full scale for an
n-bit converter). Any deviation of the measured "step" from the ideal difference is
called differential linearity error expressed in multiplies of 1LSB. It is an important
specification because a differential linearity error greater than 1LSB can lead to
non-monotonic response in a D/A converter and missed codes in an A/D convert-
er.
14. Monotonic
- A DAC is said to be monotonic if the output either increases or
remains constant as the digital input increases with the result that the output will
always be a single-valued function of the input. The specification "monotonic"
Final Setting
V
0
+
V
0
1
Slewing
Setting Time to
V
0
V
0
Slew Rate