Table of Contents
1.1 Library Description .............................................................................................. 1-1
1.2 Features .............................................................................................................. 1-2
1.3 EDA Support ....................................................................................................... 1-4
1.4 Product Family..................................................................................................... 1-4
1.4.1 Analog Core Cells...................................................................................... 1-4
1.4.2 Internal Macrocells .................................................................................... 1-12
1.4.3 Compiled Macrocells ................................................................................. 1-12
1.4.4 Input/Output Cells...................................................................................... 1-14
1.5 Timings................................................................................................................ 1-16
1.6 Delay Model ........................................................................................................ 1-22
1.7 Testability Design Methodology........................................................................... 1-24
1.8 Maximum Fanouts............................................................................................... 1-27
1.9 Packages Capability by Lead Count ................................................................... 1-34
1.10
Power Dissipation............................................................................................. 1-36
1.11
V
DD
/V
SS
Rules and Guidelines.......................................................................... 1-39
1.12
Crystal Oscillator Considerations...................................................................... 1-45