- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄383838 > ST20GP6 MAX 7000 CPLD 256 MC 208-RQFP PDF資料下載
參數(shù)資料
| 型號： | ST20GP6 |
| 英文描述： | MAX 7000 CPLD 256 MC 208-RQFP |
| 中文描述： | GPS處理器 |
| 文件頁數(shù)： | 28/116頁 |
| 文件大?。?/td> | 1107K |
| 代理商： | ST20GP6 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁當前第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁
ST20-GP1
28/116
5
Interrupt controller
The ST20-GP1 supports external interrupts, enabling an on-chip subsystem or external interrupt
pin to interrupt the currently running process in order to run an interrupt handling process.
The ST20-GP1 interrupt subsystem supports five prioritized interrupts. This allows nested pre-
emptive interrupts for real-time system design. Three interrupts are connected to on-chip
peripherals (2 for the UARTs, 1 for the programmable IO) and two are available as external
interrupt pins.
All interrupts are at a higher priority than the high priority process queue, see Figure 5.1. Each
interrupt level has a higher priority than the previous (interrupt 0 is lowest priority) and each level
supports only one software handler process.Note that interrupt handlers must not prevent the GPS
DSP data traffic from being handled. During continuous operation this has 1 ms latency and is not
a problem, but during initial acquisition it has a 32
μ
s rate and thus all interrupts must be disabled
except if used to stop GPS operation.
Figure 5.1 Interrupt priority
Interrupts on the ST20-GP1 are implemented via an on-chip interrupt controller peripheral. An
interrupt can be signalled to the controller by one of the following:
a signal on an external
Interrupt
pin
a signal from an internal peripheral or subsystem
software asserting an interrupt in a bit mask
Interrupt 3
Interrupt0
pin
Interrupt 1
UART0
Interrupt 0
Programmable IO
High priority
process
Low priority
process
Increasing
pre-emption
Interrupt 2
UART1
Interrupt 4
Interrupt1
pin
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ST25C02AB1 | IC FLEX 6000 FPGA 16K 144-TQFP |
| ST25C02AB6 | Stratix FPGA 25K FBGA-672 |
| ST25C02AM1 | IC ACEX 1K FPGA 100K 208-PQFP |
| ST25C02AM6 | Cyclone II FPGA 20K FBGA-256 |
| ST25C04ML1 | IC FLEX 6000 FPGA 24K 144-TQFP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ST20-GP6 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:GPS PROCESSOR |
| ST20GP6CT33S | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:GPS PROCESSOR |
| ST20GP6CX33S | 功能描述:射頻無線雜項 GPS Processor RoHS:否 制造商:Texas Instruments 工作頻率:112 kHz to 205 kHz 電源電壓-最大:3.6 V 電源電壓-最小:3 V 電源電流:8 mA 最大功率耗散: 工作溫度范圍:- 40 C to + 110 C 封裝 / 箱體:VQFN-48 封裝:Reel |
| ST20GP6CX33STR | 功能描述:射頻無線雜項 GPS Processor RoHS:否 制造商:Texas Instruments 工作頻率:112 kHz to 205 kHz 電源電壓-最大:3.6 V 電源電壓-最小:3 V 電源電流:8 mA 最大功率耗散: 工作溫度范圍:- 40 C to + 110 C 封裝 / 箱體:VQFN-48 封裝:Reel |
| ST20GP6X33S | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:GPS PROCESSOR |
發(fā)布緊急采購，3分鐘左右您將得到回復。