參數(shù)資料
型號: ST20GP6
英文描述: MAX 7000 CPLD 256 MC 208-RQFP
中文描述: GPS處理器
文件頁數(shù): 23/116頁
文件大?。?/td> 1107K
代理商: ST20GP6
ST20-GP1
23/116
Figure 4.3 Timer registers
4.6
Traps and exceptions
A software error, such as arithmetic overflow or array bounds violation, can cause an error flag to
be set in the CPU. The flag is directly connected to the
ErrorOut
pin. Both the flag and the pin can
be ignored, or the CPU stopped. Stopping the CPU on an error means that the error cannot cause
further corruption. As well as containing the error in this way it is possible to determine the state of
the CPU and its memory at the time the error occurred. This is particularly useful for postmortem
debugging where the debugger can be used to examine the state and history of the processor
leading up to and causing the error condition.
In addition, if a trap handler process is installed, a variety of traps/exceptions can be trapped and
handled by software. A user supplied trap handler routine can be provided for each high/low
process priority level. The handler is started when a trap occurs and is given the reason for the
trap. The trap handler is not re-entrant and must not cause a trap itself within the same group. All
traps are individually maskable.
4.6.1
The trap mechanism is arranged on a per priority basis. For each priority there is a handler for each
group of traps, as shown in Figure 4.4.
Trap groups
ClockReg0
TnextReg0
TptrReg0
Workspaces
Program
5
21
31
Empty
comparator
Alarm
21
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