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參數(shù)資料
| 型號(hào)： | MT8LLN22NCNE |
| 元件分類： | 總線控制器 |
| 英文描述： | PCI BUS CONTROLLER, PBGA316 |
| 封裝： | 27 X 27 MM, PLASTIC, BGA-316 |
| 文件頁(yè)數(shù)： | 7/145頁(yè) |
| 文件大?。?/td> | 2285K |
| 代理商： | MT8LLN22NCNE |
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Coppertail Product Specification
MT8LLN22NCNE.fm – Rev. 1, Pub. 2/02
104
2002, Micron Technology Inc.
PRELIMINARY
MT8LLN22NCNE
COPPERTAIL
IRQ Status Register
NOTE:
This register is core powered and is reset with P_RST#.
NOTE:
Register is standby powered and unaffected by SB_POWEROK or P_RST#. Reset only with RSMRST#.
ADDRESS: ACPI_BASE + 42h
SYMBOL: IRQ_STS
BITS
DESCRIPTION
PROPERTIES
RESET
15:0
IRQ[15:0] SMI status. Status bit will be set with any assertion of the inter-
rupt regardless of the mask.
R/WOTC
0
General Purpose I/O Select
ADDRESS: ACPI_BASE + 50h
SYMBOL: GPIO_SEL
BITS
DESCRIPTION
PROPERTIES
RESET
31:22
Reserved.
R/W
0
21
CPUSTP# Select. When set, CPUSTP# is used as GPIO[21]. When clear,
CPUSTP# maintains normal function.
R/W
0
20
PCISTP# Select. When set, PCISTP# is used as GPIO[21]. When clear,
PCISTP# maintains normal function.
R/W
0
19
DCSTP# Select. When set, DCSTP# is used as GPIO[21]. When clear,
DCSTP# maintains normal function.
R/W
0
18
APIC_D[1] Select. When set, APIC_D[1] I/O is used as GPIO[18]. When
clear, APIC_D[1] maintains normal function.
R/W
0
17
APIC_D[0] Select. When set, APIC_D[0] I/O is used as GPIO[17]. When
clear, APIC_D[0] maintains normal function.
R/W
0
16
SMB_CLK Select. When set, SMB_CLK is used as GPIO[16]. When clear,
SMB_CLK maintains normal function.
R/W
0
15
SMB_DATA Select. When set, SMB_DATA is used as GPIO[15]. When clear,
SMB_DATA maintains normal function.
R/W
0
14
ALERT Select. When set, ALERT is used as GPIO[14]. When clear, ALERT
maintains normal function.
R/W
0
13:9
Micron Reserved
R/W
0
8
H_THRM# Select. When set H_THRM# is used as GPIO[8]. When clear,
H_THRM# maintains normal function.
R/W
0
7:0
Micron Reserved.
R/W
0
General Purpose I/O Event Enable
ADDRESS: ACPI_BASE + 54h
SYMBOL: GPIO_EVT_EN
BITS
DESCRIPTION
PROPERTIES
RESET
31:22
Reserved.
R/W
0
21:14
GPIO Event Enable. When a bit corresponding to a GPIO is set, the GPIO
event is enabled and will set GPSTS0 bit 8. When a bit corresponding to a
GPIO is clear, the GPIO event is disabled.
R/W
0
13:9
Micron Reserved.
R/W
0
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT8LLN22NCNE-A | 制造商:Micron Technology Inc 功能描述:COPPERTAIL CHIPSET - Trays |
| MT8LLN22NCNE-A2 | 制造商:Micron Technology Inc 功能描述:COPPERTAIL CHIPSET AND MOTHERBOARD - Trays |
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| MT8LSDT1664 | 制造商:Micron Technology Inc 功能描述:128MB 16MX64 SDRAM MODULE PBF DIMM 3.3V - Trays |
| MT8LSDT1664AG-10EB1 | 制造商:Micron Technology Inc 功能描述:DRAM MOD SDRAM 1GBIT 168UDIMM - Trays |
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