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參數(shù)資料
| 型號： | MT8LLN22NCNE |
| 元件分類： | 總線控制器 |
| 英文描述： | PCI BUS CONTROLLER, PBGA316 |
| 封裝： | 27 X 27 MM, PLASTIC, BGA-316 |
| 文件頁數(shù)： | 28/145頁 |
| 文件大?。?/td> | 2285K |
| 代理商： | MT8LLN22NCNE |
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Coppertail Product Specification
MT8LLN22NCNE.fm – Rev. 1, Pub. 2/02
123
2002, Micron Technology Inc.
PRELIMINARY
MT8LLN22NCNE
COPPERTAIL
LPC Interface
The I/O Controller implements a Low Pin Count
(LPC) interface as described in the LPC specification.
The LPC Bridge function of the I/O Controller resides
in function 0. In addition to the LPC bridge interface
function, function 0 contains other functional units
including DMA, Interrupt Controllers, Timers, Power
Management, System Management, GPIO, and RTC.
LPC Transaction Types
The I/O Controller supports all transaction types
described by the LPC Interface specification. Table 23
describes the actions of each transaction type.
Table 23
LPC Transaction Types
TRANSACTION TYPE
ACTION
MEMORY READ
Performed as one-byte READs. PCI cycles that are more than
one byte will be issued as multiple single byte transfers. If the
READ cycle is not accepted by any LPC device, then all one’s are
returned to mimic the pull-up resistors used on the legacy ISA
bus.
MEMORY WRITE
Performed as one-byte WRITEs. PCI cycles that are more than
one byte will be issued as multiple single byte transfers. If an
LPC device does not accept the write, then the WRITE data is
discarded.
I/O READ
Performed as one-byte READs. PCI cycles that are more than
one byte will be issued as multiple single byte transfers. If the
READ cycle is not accepted by any LPC device, then all one’s are
returned to mimic the pull-up resistors used on the legacy ISA
bus.
I/O WRITE
Performed as one-byte WRITEs. PCI cycles that are more than 1
byte will be issued as multiple single byte transfers. If an LPC
device does not accept the write, then the WRITE data is dis-
carded.
DMA READ
Performed as one- or two-byte READs. Two-byte READs must
be naturally aligned on word boundaries.
DMA WRITE
Performed as one- or two-byte WRITEs. Two-byte WRITEs must
be naturally aligned on word boundaries.
BUS MASTER READ
One or two byte bus master READs are accepted. Two-byte
READs must be naturally aligned on word boundaries.
BUS MASTER WRITE
One or two byte bus master WRITEs are accepted. Two-byte
WRITEs must be naturally aligned on word boundaries.
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