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MC145572
C–1
MOTOROLA
The MC145572 is manufactured using high speed CMOS VLSI process technology to implement the
mixed signal processing functions required in the device. The U–interface transceiver has a high
resolution sigma–delta ADC and a precision DAC, in addition to three high speed digital signal copro-
cessors. The fully differential analog circuit design techniques used for this device result in superior
performance for the ADC, DAC, and Tx Driver sections. Special attention was given to the design
of the MC145572 to reduce sensitivity to noise, including power supply rejection and susceptibility
to radio frequency noise. This special attention to circuit design, results in an ADC with greater than
84 dB dynamic range on the same monolithic chip as the digital signal coprocessors clocking at
10.24 MHz, all of which operates on a single 5–V power supply. This device was designed to ease
the task of PCB layout, but due to the wide analog dynamic range and high digital clock rate, special
care should be taken during PCB layout to assure optimum transmission performance.
NOTE
When laying out the PCB, do not run any digital signals through the line interface region
of the board. Switching noise from the digital signals can be coupled into the line interface
and reduce performance, especially on long loops. Wire wrap is not recommended for
prototyping.
The device should be soldered to the PC board for production manufacturing. If the device is to be
used in a socket, it should be placed in a low parasitic pin capacitance socket of 1.5 pF or less.
This device is often used in digital switching equipment applications which require plugging the PC
board into a rack with power applied. This is referred to as “hot–rack insertion”. In these applications,
care should be taken to limit the voltage on any pin from going positive relative to the VDD pins, or
negative relative to the VSS pins. One method to accomplish this is to extend the ground and power
contacts of the PCB connector so that power is applied prior to any other pins having voltage applied.
The device has input protection on all pins and may source or sink a limited amount of current without
damage. See Section 10.1,
Absolute Maximum Ratings,
for more information concerning the cur-
rent into or out of the device pins. Current limiting may be accomplished by series resistors between
the signal pins and the connector contacts.
The most important considerations for PCB layout deal with noise. This includes noise on the power
supply, noise generated by the digital circuitry on the device, and coupling digital signals into the
analog signals. The best PCB layout methods to prevent noise–induced problems are:
1.
Keep digital signals as far away from analog signals as possible.
2.
Use short, low inductance traces for the analog circuitry to reduce inductive, capacitive, and
radio frequency noise sensitivities.
3.
Use short, low inductance traces for digital circuitry to reduce inductive, capacitive, and radio
frequency radiated noise.
4.
Bypass capacitors should be connected between the VDD and VSS pairs with minimal trace
length. These capacitors help supply the instantaneous currents of the digital circuitry, in addi-
tion to decoupling the noise that may be generated by other sections of the device or other
circuitry on the power supply.