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參數(shù)資料
| 型號(hào)： | MC14557 |
| 廠商： | ON SEMICONDUCTOR |
| 英文描述： | 1-to-64 Bit Variable Length Shift Register |
| 中文描述： | 1到64位可變長(zhǎng)度移位寄存器 |
| 文件頁(yè)數(shù)： | 1/6頁(yè) |
| 文件大?。?/td> | 203K |
| 代理商： | MC14557 |
MOTOROLA CMOS LOGIC DATA
Motorola, Inc. 1995
1
MC14557B
The MC14557B is a static clocked serial shift register whose length may
be programmed to be any number of bits between 1 and 64. The number of
bits selected is equal to the sum of the subscripts of the enabled Length
Control inputs (L1, L2, L4, L8, L16, and L32) plus one. Serial data may be
selected from the A or B data inputs with the A/B select input. This feature is
useful for recirculation purposes. A Clock Enable (CE) input is provided to
allow gating of the clock or negative edge clocking capability.
The device can be effectively used for variable digital delay lines or simply
to implement odd length shift registers.
1–64 Bit Programmable Length
Q and Q Serial Buffered Outputs
Asynchronous Master Reset
All Inputs Buffered
No Limit On Clock Rise and Fall Times
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Capable of Driving Two Low–power TTL Loads or one Low–power
Schottky TTL Load Over the Rated Temperature Range
(Voltages Referenced to VSS)
Symbol
Parameter
Value
Unit
VDD
Vin, Vout
Iin, Iout
DC Supply Voltage
– 0.5 to + 18.0
V
Input or Output Voltage (DC or Transient)
– 0.5 to VDD + 0.5
±
10
V
Input or Output Current (DC or Transient),
per Pin
mA
PD
Tstg
TL
Power Dissipation, per Package
500
mW
Storage Temperature
– 65 to + 150
C
Lead Temperature (8–Second Soldering)
260
C
* Maximum Ratings are those values beyond which damage to the device may occur.
Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C
Ceramic “L” Packages: – 12 mW/ C From 100 C To 125 C
LENGTH SELECT TRUTH TABLE
L32
L16
L8
L4
L2
0
0
0
0
1
0
L1
0
1
Register Length
1 Bit
6 Bits
1
1
0
0
0
1
0
0
0
1
0
1
0
1
0
0
0
0
1
1
34 Bits
64 Bits
0
0
1
1
0
0
0
1
0
0
0
1
0
0
0
1
0
1
0
1
1
0
0
0
2 Bits
5 Bits
33 Bits
63 Bits
0
0
0
1
0
1
0
1
0
1
1
1
0
1
1
1
3 Bits
4 Bits
62 Bits
1
1
1
1
0
0
61 Bits
NOTE: Length equals the sum of the binary length control
subscripts plus one.
SEMICONDUCTOR TECHNICAL DATA
REV 3
1/94
BLOCK DIAGRAM
L SUFFIX
CERAMIC
CASE 620
ORDERING INFORMATION
MC14XXXBCP
MC14XXXBCL
MC14XXXBDW
TA = – 55
°
to 125
°
C for all packages.
Plastic
Ceramic
SOIC
P SUFFIX
PLASTIC
CASE 648
DW SUFFIX
SOIC
CASE 751G
TRUTH TABLE
Inputs
A/B
0
1
0
1
X
Output
Q
B
A
B
A
0
Rst
0
0
0
0
1
Q is the output of the first selected shift
register stage.
X = Don’t Care
Clock
CE
0
0
1
1
X
X
12
13
14
1
15
2
9
7
6
5
4
3
11
10
RESET
CLOCK
CE
B
A
A/B SELECT
L1
L2
L4
L8
L16
L32
Q
Q
VDD = PIN 16
VSS = PIN 8
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC14557B | 1-to-64 Bit Variable Length Shift Register |
| MC14557BCP | 1-to-64 Bit Variable Length Shift Register |
| MC14557BDW | 1-to-64 Bit Variable Length Shift Register |
| MC14557BF | 1-to-64 Bit Variable Length Shift Register |
| MC14557BCP | Dual Processor Supervisory Circuits 8-SOIC -40 to 85 |
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