參數(shù)資料
型號： M7A3PE600-FFGG484I
元件分類： FPGA
英文描述： FPGA, 600000 GATES, PBGA484
封裝： 1 MM PITCH, GREEN, FBGA-484
文件頁數(shù)： 154/168頁
文件大?。?/td> 1335K
代理商： M7A3PE600-FFGG484I
ProASIC3E Flash Family FPGAs
3- 18
Advanced v0.5
Table 3-17 Summary of I/O Timing Characteristics – Software Default Settings
–2 Speed Grade, Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 3.0 V
I/O Standard
Driv
e
St
re
ng
th
(mA)
Sl
ew
R
a
te
C
a
p
a
citi
ve
L
o
ad
(p
F
)
Exter
n
al
Resistor
(Ohm)
t
DOUT
t
DP
t
DIN
t
PY
t
PYS
t
EO
UT
t
ZL
t
ZH
t
LZ
t
HZ
t
ZLS
t
ZHS
Un
its
3.3 V LVTTL
/
3.3 V LVCMOS
12 mA
High
35
–
0.49 2.74 0.03 0.90 1.170.322.792.142.452.704.463.81
ns
2.5 V LVCMOS
12 mA
High
35
–
0.49 2.80 0.03 1.13 1.240.322.852.612.512.614.524.28
ns
1.8 V LVCMOS
12 mA
High
35
–
0.49 2.83 0.03 1.08 1.420.322.892.312.793.164.563.98
ns
1.5 V LVCMOS
12 mA
High
35
–
0.49 3.30 0.03 1.27 1.600.323.362.702.963.275.034.37
ns
3.3 V PCI
Per PCI spec
High
10
25 2 0.49 2.09 0.03 0.78 1.25 0.32 2.13 1.49 2.45 2.70 3.80 3.16
ns
3.3 V PCI-X
Per PCI-X
spec
High
10
25 2 0.49 2.09 0.03 0.78 1.25 0.32 2.13 1.49 2.45 2.70 3.80 3.16
ns
3.3 V GTL
25 mA
High
10
25
0.45 1.55 0.03 2.19
–
0.32 1.52 1.55
–
3.19 3.22
ns
2.5 V GTL
25 mA
High
10
25
0.45 1.59 0.03 1.83
–
0.32 1.61 1.59
–
3.28 3.26
ns
3.3 V GTL+
35 mA
High
10
25
0.45 1.53 0.03 1.19
–
0.32 1.56 1.53
–
3.23 3.20
ns
2.5 V GTL+
33 mA
High
10
25
0.45 1.65 0.03 1.13
–
0.32 1.68 1.57
–
3.35 3.24
ns
HSTL (I)
8 mA
High
20
50
0.49 2.37 0.03 1.59
–
0.32 2.42 2.35
–
4.09 4.02
ns
HSTL (II)
15 mA
High
20
25
0.49 2.26 0.03 1.59
–
0.32 2.30 2.03
–
3.97 3.70
ns
SSTL2 (I)
15 mA
High
30
50
0.49 1.59 0.03 1.00
–
0.32 1.62 1.38
–
3.29 3.05
ns
SSTL2 (II)
18 mA
High
30
25
0.49 1.62 0.03 1.00
–
0.32 1.65 1.32
–
3.32 2.99
ns
SSTL3 (I)
14 mA
High
30
50
0.49 1.72 0.03 0.93
–
0.32 1.75 1.37
–
3.42 3.04
ns
SSTL3 (II)
21 mA
High
30
25
0.49 1.54 0.03 0.93
–
0.32 1.57 1.25
–
3.24 2.92
ns
LVDS/BLVDS/
M-LVDS
24 mA
High
–
0.49 1.57 0.03 1.36
––––––––
ns
LVPECL
24 mA
High
–
0.49 1.60 0.03 1.22
––––––––
ns
Notes:
1. For specific junction temperature and voltage-supply levels, refer to Table 3-6 on page 3-4 for derating values.
2. Resistance is used to measure I/O propagation delays as defined in PCI specifications. See Figure 3-10 on page 3-35 for connectivity.
This resistor is not required during normal operation.
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