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150 of 162
October 20, 2006
IDT IDT88K8483
AC Characteristics
Differential Output Short Circuit Cur-
rent
IOSD
+/- Outputs shorted together
-
12
mA
HSTL I/O
Low-Level Input Voltage
VIL
-0.3
-
VQDR_VRE
F-0.1
V
High-Level Input Voltage
VIH
VQDR_VRE
F+0.1
-VDDH25+
0.3
V
Low-Level Output Voltage
VOL
Driver calibrated to 50
Ω
--
0.4
V
High-Level Output Voltage
VOH
Driver calibrated to 50
Ω
VDDH25-
0.4
--
V
Parameter
Symbol
Conditions
Min
Typ
Max1
Unit
Clock Interface.
Reference clock (SPI4M_RCLK,
SPI4B_RCLK, SPI4A_RCLK) frequency
DIV4=0
19.44
28.125
MHz
Reference clock Duty cycle
DIV4=0
30
50
70
%
Reference clock PPM
DIV4=0
30
PPM
Reference clock frequency
DIV4=1
77.76
112.5
MHz
Reference clock duty cycle
DIV4=1
30
50
70
%
Reference clock PPM
DIV4=1
30
PPM
MCLK internal clock frequency
124
200
MHz
SPI-4 Interface LVDS Input.
DCLK clock frequency
77.76
450
MHz
SCLK clock frequency
77.76
450
MHz
DCLK clock duty cycle
45
50
55
%
SCLK clock duty cycle
45
50
55
%
Fall time (20%, 80%)
TIA/EIA-644
300
500
ps
Rise time (20%, 80%)
TIA/EIA-644
300
500
ps
Differential Skew (P to N)
TSKEW1
50
ps
Clock jitter tolerance
0.44
UI
Data skew tolerance
2UI
Input data jitter tolerance
0.13
UI
SPI-4 Interface LVDS Output. Figure TBD.
DCLK clock frequency
77.76
450
MHz
SCLK clock frequency
77.76
450
MHz
Table 168 AC Characteristics (Part 1 of 4)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Table 167 DC Characteristics (Part 2 of 2)