參數(shù)資料
型號： IDT88K8483BRI
廠商： IDT, Integrated Device Technology Inc
文件頁數(shù)： 116/162頁
文件大小： 0K
描述： IC SPI-4 EXCHANGE 3PORT 672-BGA
標(biāo)準(zhǔn)包裝： 24
系列： *
其它名稱： 88K8483BRI
57 of 162
October 20, 2006
IDT IDT88K8483
Figure 24 Flow Control Mode 1 Application Example
Flow Control Mode 2 - Buffering
In the buffering option the IDT88K8483 gets the data in interleaved mode or in packet mode and it sends the data in packet mode or in interleave
mode. In this option, the EBC[2:0] field in the (p. 129) should be configured to the number of FIFOs in the QDR-II (64, 32, 16, 8 or 4) as described in
. Each FIFO gets the same amount of buffer size.
Figure 25 QDR-II FIFOs Allocation Example For Buffering Option
In buffering option, the PFP and the QDR-II should be programed to packet mode by setting to 1 the PKT_MODE field in the PFP Egress Packet
field in the Auxiliary Early Backpressure Threshold Register (p. 131) should be programmed with the early back-pressure threshold value. Also, the
flow control mode 2 should be enabled in the PFP by setting to 1 the EBP_EN field in the PFP Egress Packet Mode Control Registers (p. 123). The
device fixes the Second Free Segments (Second Free Segments) to 6 as shown in Figure 26 QDR-II Flow Control Example For Buffering
There are three status options per FIFO in the QDR-II: starving hungry and satisfied. In the QDR-II for LP0 (for example), in normal operation there
are enough free segments, so the FIFO status is starving, and the QDR-II is sending starving status to the PFP. When the number of free segments is
less than EBP_THR (for example 100 segments), the QDR-II FIFO status is changed to hungry, and the QDR-II starts sending hungry status to the
PFP. When the number of free segments is less than the Second Free Segments (6 segments), the QDR-II FIFO status is changed to satisfied, and
the QDR-II starts sending satisfied status to the PFP.
SPI-4
Ingress
Port
Buffer
SPI-4
Egress
Port
Buffer
PFP
Ingress
SPI-4
Ingress
Interface
SPI-4
Egress
Interface
QDR
PFP
Egress
Framer
NP
508 segments
127K bytes
508 segments
127K bytes
8K segments
2M bytes
Reassembly
Interleaved
Channels
Non-Interleaved
Channels
data
status
data
status
LID 63
LID 1
LID 0
QDR-II (8K segments, 2M bytes, 16M bits)
...
128 segments / 32K bytes
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IDT88P8341BHI 功能描述:IC SPI3-SPI4 EXCHANGE 820-PBGA RoHS:否 類別:集成電路 (IC) >> 專用 IC 系列:* 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 類型:調(diào)幀器 應(yīng)用:數(shù)據(jù)傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應(yīng)商設(shè)備封裝:400-PBGA（27x27） 包裝:散裝
IDT88P8342BHGI 功能描述:IC SPI3-SPI4 EXCHANGE 820-PBGA RoHS:是 類別:集成電路 (IC) >> 專用 IC 系列:* 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 類型:調(diào)幀器 應(yīng)用:數(shù)據(jù)傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應(yīng)商設(shè)備封裝:400-PBGA（27x27） 包裝:散裝
IDT88P8342BHI 功能描述:IC SPI3-SPI4 EXCHANGE 820-PBGA RoHS:否 類別:集成電路 (IC) >> 專用 IC 系列:* 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 類型:調(diào)幀器 應(yīng)用:數(shù)據(jù)傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應(yīng)商設(shè)備封裝:400-PBGA（27x27） 包裝:散裝
IDT88P8344 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:SPI EXCHANGE 4 x SPI-3 TO SPI-4 Issue 1.0
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