參數(shù)資料
型號(hào)： DS33ZH11+
廠商： Maxim Integrated Products
文件頁數(shù)： 19/172頁
文件大?。?/td> 0K
描述： IC MAPPER ETHERNET 100CSBGA
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 7
應(yīng)用： 數(shù)據(jù)傳輸
接口： 串行
電源電壓： 1.8V，2.5V，3.3V
封裝/外殼： 100-LFBGA，CSPBGA
供應(yīng)商設(shè)備封裝： 100-CSBGA（10x10）
包裝： 托盤
安裝類型： 表面貼裝
DS33Z11 Ethernet Mapper
115 of 172
Register Name:
SU.MACRD1
Register Description:
MAC Read Data Byte 1
Register Address:
143h
Bit #
7
6
5
4
3
2
1
0
Name
MACRD1
5
MACRD1
4
MACRD1
3
MACRD1
2
MACRD1
1
MACRD1
0
MACRD9
MACRD8
0
Bits 0 - 7: MAC Read Data 1 (MACRD8-15) One of four bytes of data read from the MAC. Valid after a read
command has been issued and the SU.MACRWC.MCS bit is zero.
Register Name:
SU.MACRD2
Register Description:
MAC Read Data Byte 2
Register Address:
144h
Bit #
7
6
5
4
3
2
1
0
Name
MACRD2
3
MACRD2
2
MACRD2
1
MACRD2
0
MACRD1
9
MACRD1
8
MACRD1
7
MACRD1
6
0
Bits 0 – 7: MAC Read Data 2 (MACRD16-23) One of four bytes of data read from the MAC. Valid after a read
command has been issued and the SU.MACRWC.MCS bit is zero.
Register Name:
SU.MACRD3
Register Description:
MAC Read Data byte 3
Register Address:
145h
Bit #
7
6
5
4
3
2
1
0
Name
MACRD3
1
MACRD3
0
MACRD2
9
MACRD2
8
MACRD2
7
MACRD2
6
MACRD2
5
MACRD2
4
0
Bits 0 – 7: MAC Read Data 3 (MACRD24-31) One of four bytes of data read from the MAC. Valid after a read
command has been issued and the SU.MACRWC.MCS bit is zero.
Register Name:
SU.MACWD0
Register Description:
MAC Write Data 0
Register Address:
146h
Bit #
7
6
5
4
3
2
1
0
Name
MACWD7
MACWD6
MACWD5
MACWD4
MACWD3
MACWD2
MACWD1
MACWD0
0
Bits 0 – 7: MAC Write Data 0 (MACWD0-7) One of four bytes of data to be written to the MAC. Data has been
written after a write command has been issued and the SU.MACRWC.MCS bit is zero.
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