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CHAPTER 3 CPU FUNCTIONS
User’s Manual U16890EJ1V0UD
86
3.4.7 Special registers
Special registers are registers that prevent invalid data from being written when an inadvertent program loop
occurs.
The V850ES/KG1 has the following three special registers.
Power save control register (PSC)
Processor clock control register (PCC)
Watchdog timer mode register (WDTM1)
Moreover, there is also the PRCMD register, which is a protection register for write operations to the special
registers that prevents the application system from unexpectedly stopping due to an inadvertent program loop. Write
access to the special registers is performed with a special sequence and illegal store operations are notified to the
SYS register.
(1) Setting data to special registers
Setting data to a special registers is done in the following sequence.
<1>
Prepare the data to be set to the special register in a general-purpose register.
<2>
Write the data prepared in step <1> to the PRCMD register.
<3>
Write the setting data to the special register (using following instructions).
Store instruction (ST/SST instruction)
Bit manipulation instruction (SET1/CLR1/NOT1 instruction)
<4> to <8> Insert NOP instructions (5 instructions)
[Description Example] When using PSC register (standby mode setting)
ST.B r11,PSMR[r0]
; PSMR register setting (IDLE, STOP mode setting)
<1> MOV 0x02,r10
<2> ST.B r10,PRCMD[r0] ; PRCMD register write
Note
.
<3> ST.B r10,PSC[r0]
<4> NOP
<5> NOP
; PSC register setting
; Dummy instruction
; Dummy instruction
Note
Note
<6> NOP
<7> NOP
<8> NOP
Note
; Dummy instruction
; Dummy instruction
; Dummy instruction
Note
Note
(next instruction)
No special sequence is required to read special registers.
Note
When switching to the IDLE mode or the STOP mode (PSC.STP bit = 1), 5 NOP instructions must be
inserted immediately after switching is performed.
Cautions 1. Interrupts are not acknowledged for the store instruction for the PRCMD register. This is
because continuous execution of store instructions by the program in steps <2> and <3>
above is assumed. If another instruction is placed between step <2> and <3>, the above
sequence may not be realized when an interrupt is acknowledged for that instruction,
which may cause malfunction.
2. The data written to the PRCMD register is dummy data, but use the same register as the
general-purpose register used for setting data to the special register (step <3>) when
writing to the PRCMD register (step <2>). The same applies to when using a general-
purpose register for addressing.