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CHAPTER 8 16-BIT TIMER/EVENT COUNTER 0
User’s Manual U16890EJ1V0UD
320
(2) Measurement of two pulse widths with free-running timer operation
The pulse widths of two signals respectively input to the TI0n0 pin and the TI0n1 pin can be simultaneously
measured when 16-bit timer/event counter 0n is used in the free-running timer mode (refer to
Figure 8-12
).
When the edge specified by the PRM0n.ESn00 and PRM0n.ESn01 bits is input to the TI0n0 pin, the value of
the TM0n register is loaded to the CR0n1 register and an external interrupt request signal (INTTM0n1) is
generated.
When the edge specified by the PRM0n.ESn10 and PRM0n.ESn11 bits is input to the TI0n1 pin, the value of
the TM0n register is loaded to the CR0n0 register and an external interrupt request signal (INTTM0n0) is
generated.
The edges of the TI0n0 and TI0n1 pins are specified by the PRM0n.ESn00 and PRM0n.ESn01 bits and the
PRM0n.ESn10 and PRM0n.ESn11 bits, respectively. Specify both rising and falling edges.
The valid edge of the TI0n0 pin is detected through sampling at the count clock cycle selected with the PRM0n
register, and the capture operation is not performed until the valid level is detected twice. As a result, noise
with a short pulse width can be eliminated.
Figure 8-12. Control Register Settings for Measurement of Two Pulse Widths
with Free-Running Timer Operation
(a) 16-bit timer mode control register 0n (TMC0n)
0
TMC0n
0
0
0
0
1
0
0
TMC0n3 TMC0n2 TMC0n1
OVF0n
Free-running timer mode
(b) Capture/compare control register 0n (CRC0n)
0
CRC0n
0
0
0
0
1
0
1
CRC0n2 CRC0n1 CRC0n0
CR0n0 used as capture register
Captures to CR0n0 at valid
edge of TI0n1 pin
CR0n1 used as capture register
(c) Prescaler mode register 0n (PRM0n)
1
1
1
1
0
PRM0n
Selects count clock
(Setting to 11 is prohibited.)
Specifies both edges for
pulse detection.
Specifies both edges for
pulse detection.
0
0/1
0/1
2
PRM0n1
PRM0n0
ESn01
ESn10
ESn11
ESn00
3
Remark
n = 0 to 3