CHAPTER 27 FLASH MEMORY (TWO POWER)
User’s Manual U16890EJ1V0UD
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27.5.3 RESET pin
If the reset signal of the flash programmer is connected to the RESET pin that is connected to the reset signal
generator on the board, signal collision takes place. To prevent this collision, isolate the connection with the reset
signal generator.
If the reset signal is input from the user system while the flash memory programming mode is set, the flash
memory will not be correctly programmed. Do not input any signal other than the reset signal of the flash programmer.
Figure 27-10. Signal Collision (RESET Pin)
RESET
Flash programmer
connection signal
Reset signal generator
Signal collision
Output pin
In the flash memory programming mode, the signal output by the reset
signal generator collides with the signal output by the flash programmer.
Therefore, isolate the signal of the reset signal generator.
V850ES/KG1
27.5.4 Port pins
When the system shifts to the flash memory programming mode, all the pins that are not used for flash memory
programming are in the same status as that immediately after reset. If the external device connected to each port
does not recognize the status of the port immediately after reset, pins require appropriate processing, such as
connecting to V
DD
via a resistor or connecting to V
SS
via a resistor.
27.5.5 Other signal pins
Connect the X1, X2, XT1, XT2, and REGC pins in the same status as in the normal operation mode.
To input the operating clock from the programmer, however, connect the clock out of the programmer to X1, and its
inverse signal to X2.
27.5.6 Power supply
Supply the same power as in the normal operation mode for the power supply (V
DD
, V
SS
, AV
REF0
, AV
REF1
, AV
SS
,
BV
DD
, BV
SS
, EV
DD
, and EV
SS
).