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2-32
Functional Description
2.2.6 Prefetching SCRIPTS Instructions
The prefetch logic in the SYM53C1010 fetches 8 Dwords of instructions
when enabled by setting the Prefetch Enable bit (bit 5) in the
DMA
Control (DCNTL)
register. The maximum burst size that can be
performed is automatically determined using the burst length values in
the
DMA Mode (DMODE)
register. If the unit cannot perform bursts of at
least four Dwords, it disables itself. While the chip is prefetching
SCRIPTS instructions, it uses the PCI cache commands Memory Read
Line and Memory Read Multiple, if PCI caching is enabled.
Note:
This feature is only useful when fetching SCRIPTS
instructions from main memory. Due to the short access
time of SCRIPTS RAM, prefetching is not necessary when
fetching instructions from SCRIPTS RAM.
To ensure the SYM53C1010 always operates from the current version of
the SCRIPTS instruction, the contents of the prefetch unit may be
flushed under certain conditions. The contents of the prefetch unit are
automatically flushed under the following conditions:
On every Memory Move instruction
The Memory Move instruction is used to place modified code into
memory. To assure the device executes recent modifications, the
prefetch unit flushes its contents and reloads the code each time an
instruction is issued. To avoid inadvertently flushing the prefetch unit
contents, use the No Flush option for all Memory Move operations
that do not modify code within the next 8 Dwords. For more
information refer to
Chapter 5, “SCSI SCRIPTS Instruction Set”
.
On every Store instruction
The Store instruction may also be used to place modified code
directly into memory. To avoid inadvertently flushing the prefetch unit
contents use the No Flush option for all Store operations that do not
modify code within the next 8 Dwords.
On every write to the
DMA SCRIPTS Pointer (DSP)
register
On all Transfer Control instructions, when the transfer conditions are
met