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IX-6
Index
instruction
address (IA)
4-115
type
5-38
block move
5-5
I/O instruction
5-15
memory move
5-35
read/write instruction
5-23
transfer control instruction
5-27
INTA routing enable
3-26
INTA/
2-48
,
2-54
,
3-26
INTB/
2-48
,
2-54
,
3-26
interface
128, 256, 512 Kbyte or 1 Mbyte
150 ns memory
B-3
16 Kbyte
200 ns memory
B-1
512 Kbyte
150 ns memory
B-4
64 Kbyte
150 ns memory
B-2
control signals
3-11
internal
arbiter
2-10
SCRIPTS RAM
2-20
internal RAM
see also SCRIPTS RAM
2-20
interrupt
A
3-13
acknowledge command
2-5
B
3-14
direction
3-15
handling
2-47
instruction
5-29
line
4-16
on the fly
5-31
on the fly (INTF)
4-49
output
6-12
pin (IP[7:0])
4-16
request
2-48
routing mode (IRM[1:0])
4-87
status one (ISTAT1)
2-48
,
4-51
status zero (ISTAT0)
2-48
,
4-47
interrupt-on-the-fly instruction
5-29
interrupts
2-50
fatal vs. nonfatal interrupts
2-50
halting
2-53
masking
2-51
sample interrupt service routine
2-54
stacked interrupts
2-52
IRDY/
3-11
IRQ mode (IRQM)
4-69
issuing cache commands
2-12
J
JTAG boundary scan testing
2-34
jump
address
5-33
call a relative address
5-30
call an absolute address
5-30
control (PMJCTL)
4-93
if true/false
5-31
instruction
5-27
JUMP64 address
5-33
L
last disconnect (LDSC)
4-46
latched SCSI parity
(SDP0L)
4-45
for SD[15:8] (SPL1)
4-46
latency
2-10
timer (LT[7:0])
4-8
LED_CNTL (LEDC)
4-80
load and store instructions
2-33
,
5-37
prefetch unit and store instructions
2-32
load/store
5-39
lost arbitration (LOA)
4-44
low voltage differential See LVD Link
2-41
LVD
driver SCSI signals
6-2
receiver SCSI signals
6-3
LVD Link
1-2
,
1-6
benefits
1-6
operation
2-41
M
MAD
bus programming
3-26
MAD[0]
3-27
MAD[3:1]
3-27
MAD[3:1] pin decoding
3-27
MAD[4]
3-26
MAD[5]
3-26
MAD[6]
3-26
MAD[7:0]
3-23
,
3-26
MAD[7]
3-26
mailbox one (MBOX1)
2-48
,
4-52
mailbox zero (MBOX0)
2-48
,
4-52
manual start mode (MAN)
4-66
MAS0/
3-23
MAS1/
3-23
masking
2-51
master
data parity error (MDPE)
4-41
,
4-67
enable (ME)
4-80
parity error enable (MPEE)
4-57
max SCSI synchronous offset (MO[5:0])
4-34
Max_Lat (ML[7:0])
4-17
maximum stress ratings
6-1
MCE/
3-23
memory
address strobe 0
3-23
address strobe 1
3-23
address/data bus
3-23
chip enable
3-23
I/O address/DSA offset
5-39
move
2-10
move instructions
2-32
,
5-34
no flush option
2-32
move read selector (MMRS)
4-99
,
4-125
move write selector (MMWS)
4-100
,
4-126
output enable
3-23
,
3-24
read
2-12
read caching
2-12
read command
2-6
read line
2-11
,
2-12
read line command
2-8
read multiple
2-11
,
2-12
read multiple command
2-7