參數(shù)資料
型號: SME1430LGA-480
元件分類: 微控制器/微處理器
英文描述: 64-BIT, 480 MHz, RISC PROCESSOR, CBGA587
封裝: CERAMIC, LGA-587
文件頁數(shù): 26/60頁
文件大?。?/td> 646K
代理商: SME1430LGA-480
32
SME1430LGA-360
SME1430LGA-440
SME1430LGA-480
Highly Integrated 64-Bit RISC; L2-Cache, DRAM, PCI Interfaces
UltraSPARC-IIi CPU
May 1999
Sun Microsystems, Inc
Read-to-Write Transition in 2-2 Mode
Figure 13 shows the read-to-write transition for 2-2 mode. Three reads are followed by two writes and two tag
updates. Since the tag and data appear in the same cycle as the write, there is no turnaround penalty for reads
followed by writes in 2-2 mode
.
Figure 13. No Turn-Around Penalty: Read-to-Write Transition (2-2 mode)
SRAM CLK
SRAM CYCLE
002345
TSYN_WR_L
W3
W4
TOE_L
R0
R1
R2
W3
W4
ECAT
A0_tag
A1_tag
A2_tag
A3_tag
A4_tag
TDATA
D0_tag
D1_tag
D2_tag
D3_tag
D4_tag
DSYN_WR_L
DOE_L
ECAD
EDATA
CPU CLK
W3
W4
R0
R1
R2
W3
W4
A0_data
A1_data
A2_data
A3_data
A4_data
D0_data
D1_data
D2 data
D3_data
D4_data
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