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參數(shù)資料
| 型號(hào)： | Q6701-H6481 |
| 廠(chǎng)商： | SIEMENS AG |
| 英文描述： | Quadruple Transceiver for S/T Interface QUAT-S |
| 中文描述： | 四聯(lián)收發(fā)器的S / T接口葛- ? |
| 文件頁(yè)數(shù)： | 36/72頁(yè) |
| 文件大?。?/td> | 1267K |
| 代理商： | Q6701-H6481 |
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PEB 2084
Semiconductor Group
36
3.3.3
Decentral D-channel handling in a PBX depends on QUAT-S application mode: LT-S or
LT-T.
LT-S Mode
. Configuration Register, MODE = 0.
It is used in PBX applications with only one signalling controller (HDLC) used for up to 32
ISDN subscribers in order to minimize system costs. A terminal is allowed to send data
only if the signalling controller is ready to receive data. The D-channel access can be
controlled via a central D-channel arbiter unit integrated in the PEB 20550, ELIC, or
according to CCITT I.430 via an arbitration logic in the QUAT-S.
D-Channel Arbitration via ELIC
. Auxiliary Register, DCM(1:0) = 11.
ELIC, PEB 20550, informs the QUAT-S whether the signalling controller (SACCO-A) is
ready to receive data. It sends commands (C/I) to individual QUAT-S channels:
C/I = 1100
H
(e.g. 1000
H
) indicates that the D-channel is “available” and can be used.
C/I = 1100
H
indicates that the D-channel currently can not be used (is “blocked”) as
the signalling controller is allocated to an other terminal.
The QUAT-S controls the connected terminal transmitters (e.g. ISAC-S, SBCX,
ISAC
-
S TE) via its S interfaces accordingly. It translates the information “available” or
“blocked” by setting the E-bit on the S interface.
E = D indicates to the terminal that its HDLC controller can send data.
E = D indicates that the HDLC controller may not send data or has to abort sending data.
D-Channel Handling
Figure 19
QUAT-S in LT-S Mode with a D-Channel Access via ELIC D-Channel Arbiter
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