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Contents-5
32192/32195/32196 Group Hardware Manual
Rev.1.10 REJ09B0123-0110 Apr.06.07
10.4 TIO (Input/Output-Related 16-Bit Timer) ----------------------------------------------------------------------------- 10-90
10.4.1
Outline of TIO ---------------------------------------------------------------------------------------------------- 10-90
10.4.2
Outline of Each Mode of TIO --------------------------------------------------------------------------------- 10-92
10.4.3
TIO Related Register Map ------------------------------------------------------------------------------------ 10-95
10.4.4
TIO Control Registers ------------------------------------------------------------------------------------------ 10-97
10.4.5
TIO Counters (TIO0CT–TIO9CT) ---------------------------------------------------------------------------- 10-105
10.4.6
TIO Reload 0/ Measure Registers (TIO0RL0–TIO9RL0) ------------------------------------------------ 10-106
10.4.7
TIO Reload 1 Registers (TIO0RL1–TIO9RL1) ------------------------------------------------------------- 10-107
10.4.8
TIO Enable Control Registers -------------------------------------------------------------------------------- 10-108
10.4.9
Operation in TIO Measure Free-Run/Clear Input Modes ----------------------------------------------- 10-110
10.4.10
Operation in TIO Noise Processing Input Mode --------------------------------------------------------- 10-112
10.4.11
Operation in TIO PWM Output Mode ----------------------------------------------------------------------- 10-113
10.4.12
Operation in TIO Single-shot Output Mode (without Correction Function) ------------------------- 10-117
10.4.13
Operation in TIO Delayed Single-shot Output Mode (without Correction Function) ------------- 10-119
10.4.14
Operation in TIO Continuous Output Mode (without Correction Function) ------------------------- 10-121
10.5 TMS (Input-Related 16-Bit Timer) ------------------------------------------------------------------------------------- 10-123
10.5.1
Outline of TMS --------------------------------------------------------------------------------------------------- 10-123
10.5.2
Outline of TMS Operation ------------------------------------------------------------------------------------- 10-123
10.5.3
TMS Related Register Map ----------------------------------------------------------------------------------- 10-125
10.5.4
TMS Control Registers ---------------------------------------------------------------------------------------- 10-126
10.5.5
TMS Counters (TMS0CT, TMS1CT) ------------------------------------------------------------------------ 10-127
10.5.6
TMS Measure Registers (TMS0MR3–0, TMS1MR3–0) ------------------------------------------------ 10-127
10.5.7
Operation of TMS Measure Input ---------------------------------------------------------------------------- 10-128
10.6 TML (Input-Related 32-Bit Timer) ------------------------------------------------------------------------------------- 10-129
10.6.1
Outline of TML --------------------------------------------------------------------------------------------------- 10-129
10.6.2
Outline of TML Operation -------------------------------------------------------------------------------------- 10-130
10.6.3
TML Related Register Map ----------------------------------------------------------------------------------- 10-130
10.6.4
TML Control Registers ----------------------------------------------------------------------------------------- 10-131
10.6.5
TML Counters ---------------------------------------------------------------------------------------------------- 10-132
10.6.6
TML Measure Registers --------------------------------------------------------------------------------------- 10-132
10.6.7
Operation of TML Measure Input ---------------------------------------------------------------------------- 10-133
10.7 TID (Input-Related 16-Bit Timer) --------------------------------------------------------------------------------------- 10-135
10.7.1
Outline of TID ---------------------------------------------------------------------------------------------------- 10-135
10.7.2
TID Related Register Map ------------------------------------------------------------------------------------- 10-137
10.7.3
TID Control & Prescaler Enable Registers ---------------------------------------------------------------- 10-138
10.7.4
TID Counters (TID0CT and TID1CT) ------------------------------------------------------------------------- 10-140
10.7.5
TID Reload Registers (TID0RL and TID1RL) -------------------------------------------------------------- 10-140
10.7.6
Outline of Each Mode of TID --------------------------------------------------------------------------------- 10-141
10.8 TOU (Output-Related 24-Bit Timer) ----------------------------------------------------------------------------------- 10-146
10.8.1
Outline of TOU --------------------------------------------------------------------------------------------------- 10-146
10.8.2
Outline of Each Mode of TOU -------------------------------------------------------------------------------- 10-148
10.8.3
TOU Related Register Map ----------------------------------------------------------------------------------- 10-150
10.8.4
TOU Control Registers ----------------------------------------------------------------------------------------- 10-153
10.8.5
Shorting Prevention Function Registers ------------------------------------------------------------------- 10-155
10.8.6
TOU Counters --------------------------------------------------------------------------------------------------- 10-157
10.8.7
TOU Reload Registers ----------------------------------------------------------------------------------------- 10-160
10.8.8
TOU Enable Protect Registers ------------------------------------------------------------------------------ 10-163