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32192/32195/32196 Group Hardware Manual
OVERVIEW
Rev.1.10 REJ09B0123-0110 Apr.06.07
Table 1.3.1 Description of Pin Functions (1/3)
Type
Pin Name
Signal Name
Input/Output Description
Power supply
VCCER
Internal power
–
Power supply input for the internal voltage generator circuit
supply input
(5.0 V ± 0.5 V or 3.3 V ± 0.3 V).
VCCE
Port/internal
–
Power supply input for the port and internal peripheral I/O
peripheral I/O pin
pins (5.0 V ± 0.5 V or 3.3 V ± 0.3 V).
power supply input
Apply same voltage to the all VCCE pins.
VCC-BUS
Port/bus interface
–
Power supply input for the port and bus interface pins
pin power supply
(5.0 V ± 0.5 V or 3.3 V ± 0.3 V).
input
Apply same voltage to the all VCC-BUS pins.
VDDE
RAM power supply
–
Backup power supply input for the internal RAM (5.0 V ± 0.5 V
input
or 3.3 V ± 0.3 V).
VSS
Ground
–
Connect all VSS pins to ground (GND).
THERMAL-
THERMAL BALL
–
Connect THERMAL BALL to the ground (GND).
BALL(Note 2)
EXCVCC
VCCER control
–
This pin connects an external capacitor for the internal
voltage generator circuit.
EXCVDD
VDDE control
–
This pin connects an external capacitor for the internal
power supply of the internal RAM.
Clock
XIN,
Clock input
Input
These are clock input/output pins. Including a PLL-based ×8
XOUT
Clock output
Output
frequency multiplier, they input 1/8 of the CPU clock frequency.
(XIN input is 20 MHz when f(CPUCLK) = 160 MHz.)
CLKOUT,
System clock
Output
The CLKOUT pin outputs a clock that is equal to the external
BCLK
input clock frequency, XIN (i.e., CLKOUT output is 20 MHz
when f(CPUCLK) = 160 MHz), or two times of XIN (i.e.,
CLKOUT output is 40 MHz when f(CPUCLK) = 160 MHz).
(It is used when operationg synchronous setting in external)
This clock is used when operations are synchronous
external to the chip.The BCLK pin outputs a clock that is two
times the external input clock frequency, XIN (i.e., BCLK
output is 40 MHz when f(CPUCLK) = 160 MHz).
Reset
RESET#
Reset
Input
Reset input pin for the internal circuit.
Mode
MOD0
Mode
Input
Set the microcomputer’s operation mode.
MOD2
MOD0
MOD1
MOD2
Mode
L
Single-chip mode
L
H
L
External extension mode
H
L
Processor mode (boot mode)
(Note 1)
H
L
(Settings inhibited)
X
H
(Settings inhibited)
X: Don’t care
Flash protect
FP
Flash protect
Input
This special pin protects the flash memory against rewrites
in hardware.
Address bus
A9–A30
Address bus
Output
Twenty-two address lines (A9–A30) are included, allowing
four blocks each up to 8 Mbyte memory space to be
connected external to the chip. A31 is not output.
Note 1: Boot mode requires that the FP pin should be at the “H” level. For details about boot mode, see Chapter 6, “Internal
Memory.”
Note 2: THERMAL BALL has a pin only in the M32192F8xWG.
1.3 Pin Functions