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參數(shù)資料
| 型號(hào)： | 56F8014 |
| 廠商： | 飛思卡爾半導(dǎo)體(中國(guó))有限公司 |
| 英文描述： | 16-bit Digital Signal Controllers |
| 中文描述： | 16位數(shù)字信號(hào)控制器 |
| 文件頁數(shù)： | 56/124頁 |
| 文件大小： | 1878K |
| 代理商： | 56F8014 |
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56F8014 Technical Data, Rev. 3
56
Freescale Semiconductor
Preliminary
5.6.7.1
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
Reserved—Bits 15–6
5.6.7.2
These values determine which IRQ will be Fast Interrupt 0. Fast Interrupts vector directly to a service
routine based on values in the Fast Interrupt Vector Address registers without having to go to a jump table
first. IRQs used as Fast Interrupts
must
be set to priority level 2. Unexpected results will occur if a Fast
Interrupt vector is set to any other priority. A Fast Interrupt automatically becomes the highest-priority
level 2 interrupt regardless of its location in the interrupt table prior to being declared as Fast Interrupt.
Fast Interrupt 0 has priority over fast Interrupt 1. To determine the vector number of each IRQ, refer to the
vector table.
Fast Interrupt 0 Vector Number (FAST INTERRUPT 0)—Bits 5–0
5.6.8
Fast Interrupt 0 Vector Address Low Register (FIVAL0)
Figure 5-10 Fast Interrupt 0 Vector Address Low Register (FIVAL0)
5.6.8.1
The lower 16 bits of the vector address used for Fast Interrupt 0. This register is combined with FIVAH0
to form the 21-bit vector address for Fast Interrupt 0 defined in the FIM0 register.
Fast Interrupt 0 Vector Address Low (FIVAL0)—Bits 15—0
5.6.9
Fast Interrupt 0 Vector Address High Register (FIVAH0)
Figure 5-11 Fast Interrupt 0 Vector Address High Register (FIVAH0)
5.6.9.1
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
Reserved—Bits 15–5
5.6.9.2
The upper five bits of the vector address used for Fast Interrupt 0. This register is combined with FIVAL0
to form the 21-bit vector address for Fast Interrupt 0 defined in the FIM0 register.
Fast Interrupt 0 Vector Address High (FIVAH0)—Bits 4–0
Base + $7
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Read
Write
RESET
FAST INTERRUPT 0 VECTOR ADDRESS LOW
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Base + $8
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Read
Write
RESET
0
0
0
0
0
0
0
0
0
0
0
FAST INTERRUPT 0 VECTOR
ADDRESS HIGH
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
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相關(guān)代理商/技術(shù)參數(shù) |
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