參數(shù)資料
型號: 56F8014
廠商: 飛思卡爾半導體(中國)有限公司
英文描述: 16-bit Digital Signal Controllers
中文描述: 16位數(shù)字信號控制器
文件頁數(shù): 26/124頁
文件大?。?/td> 1878K
代理商: 56F8014
56F8014 Technical Data, Rev. 3
26
Freescale Semiconductor
Preliminary
3.4 Block Diagram
Figure 3-2
provides a block diagram which shows how the 56F8014 creates its internal clock, using the
relaxation oscillator as an 8MHz clock reference for the PLL.
Figure 3-2 OCCS Block Diagram with Relaxation Oscillator
TRIM[9:0]
ROSB
ROPD
Relaxation
OSC
Bus Interface and
Control
Bus
Interface
GPIOB6 / RXD
PRECS
MUX
M
M
MSTR_OSC
SYS_CLK_x2
source to the SIM
(64MHz max)
ZSRC
HS PERF CLK
(96MHz max)
Postscaler
(
÷
1, 2, 4, 8, 16, 32)
Postscaler
(
÷
1, 2, 4, 8, 16, 32)
÷
3
÷
2
PLL
X 24
Lock
Detector
Loss of
Reference
Clock
Detector
Loss of Reference Clock Interrupt
LCK
F
O
/
F
PLLCOD
FOUT
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