參數(shù)資料
型號(hào): TLV320AIC34_1
廠商: Texas Instruments, Inc.
元件分類: Codec
英文描述: FOUR-CHANNEL, LOW-POWER AUDIO CODEC FOR PORTABLE AUDIO/TELEPHONY
中文描述: 四通道,低功耗音頻編解碼器的便攜式音頻/電話
文件頁數(shù): 78/94頁
文件大?。?/td> 905K
代理商: TLV320AIC34_1
www.ti.com
TLV320AIC34
SLAS538A–OCTOBER 2007–REVISED NOVEMBER 2007
Page 0 / Register 73:
LINE2LP_x and LINE2LM_x to MONO_LOP_x and MONO_LOM_x Volume Control
Register
READ/
WRITE
R/W
RESET
VALUE
0
BIT
DESCRIPTION
D7
LINE2LP_x and LINE2LM_x Output Routing Control
0: LINE2LP_x and LINE2LM_x is not routed to MONO_LOP_x and MONO_LOM_x.
1: LINE2LP_x and LINE2LM_x is routed to MONO_LOP_x and MONO_LOM_x.
LINE2LP_x and LINE2LM_x to MONO_LOP_x and MONO_LOM_x Analog Volume Control
For 7-bit register setting versus analog gain values, see
Table 7
.
D6–D0
R/W
000 0000
Page 0 / Register 74:
PGA_LP_x and PGA_LM_x to MONO_LOP_x and MONO_LOM_x Volume Control
Register
READ/
WRITE
R/W
RESET
VALUE
0
BIT
DESCRIPTION
D7
PGA_LP_x and PGA_LM_x Output Routing Control
0: PGA_LP_x and PGA_LM_x is not routed to MONO_LOP_x and MONO_LOM_x.
1: PGA_LP_x and PGA_LM_x is routed to MONO_LOP_x and MONO_LOM_x.
PGA_LP_x and PGA_LM_x to MONO_LOP_x and MONO_LOM_x Analog Volume Control
For 7-bit register setting versus analog gain values, see
Table 7
.
D6–D0
R/W
000 0000
Page 0 / Register 75:
DAC_L1 to MONO_LOP_x and MONO_LOM_x Volume Control Register
READ/
WRITE
R/W
RESET
VALUE
0
BIT
DESCRIPTION
D7
DAC_L1 Output Routing Control
0: DAC_L1 is not routed to MONO_LOP_x and MONO_LOM_x.
1: DAC_L1 is routed to MONO_LOP_x and MONO_LOM_x.
DAC_L1 to MONO_LOP_x and MONO_LOM_x Analog Volume Control
For 7-bit register setting versus analog gain values, see
Table 7
.
D6–D0
R/W
000 0000
Page 0 / Register 76:
LINE2RP_x and LINE2RM_x to MONO_LOP_x and MONO_LOM_x Volume Control
Register
READ/
WRITE
R/W
RESET
VALUE
0
BIT
DESCRIPTION
D7
LINE2RP_x and LINE2RM_x Output Routing Control
0: LINE2RP_x and LINE2RM_x is not routed to MONO_LOP_x and MONO_LOM_x.
1: LINE2RP_x and LINE2RM_x is routed to MONO_LOP_x and MONO_LOM_x.
LINE2RP_x and LINE2RM_x to MONO_LOP_x and MONO_LOM_x Analog Volume Control
For 7-bit register setting versus analog gain values, see
Table 7
.
D6–D0
R/W
000 0000
Page 0 / Register 77:
PGA_RP_x and PGA_RM_x to MONO_LOP_x and MONO_LOM_x Volume Control
Register
READ/
WRITE
R/W
RESET
VALUE
0
BIT
DESCRIPTION
D7
PGA_RP_x and PGA_RM_x Output Routing Control
0: PGA_RP_x and PGA_RM_x is not routed to MONO_LOP_x and MONO_LOM_x.
1: PGA_RP_x and PGA_RM_x is routed to MONO_LOP_x and MONO_LOM_x.
PGA_RP_x and PGA_RM_x to MONO_LOP_x and MONO_LOM_x Analog Volume Control
For 7-bit register setting versus analog gain values, see
Table 7
.
D6–D0
R/W
000 0000
78
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TLV320AIC34
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