參數(shù)資料
型號(hào)： TLV320AIC34_1
廠商： Texas Instruments, Inc.
元件分類： Codec
英文描述： FOUR-CHANNEL, LOW-POWER AUDIO CODEC FOR PORTABLE AUDIO/TELEPHONY
中文描述： 四通道，低功耗音頻編解碼器的便攜式音頻/電話
文件頁(yè)數(shù)： 37/94頁(yè)
文件大?。?/td> 905K
代理商： TLV320AIC34_1
www.ti.com
Decay Time
Target
Level
Input
Signal
Output
Signal
AGC
Gain
Attack
Time
STEREO AUDIO DAC
The TLV320AIC34 includes a stereo audio DAC in each partition supporting sampling rates from 8 kHz to
96 kHz. Each channel of the audio DACs consists of a digital audio processing block, a digital interpolation filter,
multibit digital delta-sigma modulator, and an analog reconstruction filter. The DAC is designed to provide
enhanced performance at low sampling rates through increased oversampling and image filtering, thereby
keeping quantization noise generated within the delta-sigma modulator and signal images strongly suppressed
within the audio band to beyond 20 kHz. This is realized by keeping the upsampled rate constant at 128
×
f
S(ref)
and changing the oversampling ratio as the input sample rate is changed. For an f
S(ref)
of 48 kHz, the digital
delta-sigma modulator always operates at a rate of 6.144 MHz. This ensures that quantization noise generated
within the delta-sigma modulator stays low within the frequency band below 20 kHz at all sample rates. Similarly,
for an f
S(ref)
rate of 44.1 kHz, the digital delta-sigma modulator always operates at a rate of 5.6448 MHz.
The following restrictions apply in the case when the PLL is powered down and double-rate audio mode is
enabled in the DAC.
Allowed Q values = 4, 8, 9, 12, 16
Q values where equivalent f
S(ref)
can be achieved by turning on PLL
Q = 5, 6, 7 (set P = 5 / 6 / 7 and K = 16.0 and PLL enabled)
Q = 10, 14 (set P = 5, 7 and K = 8.0 and PLL enabled)
TLV320AIC34
SLAS538A–OCTOBER 2007–REVISED NOVEMBER 2007
Figure 27. Typical Operation of the AGC Algorithm During Speech Recording
Note that the time constants here are correct when the ADC is not in double-rate audio mode. The time
constants are achieved using the f
S(ref)
value programmed in the control registers. However, if the f
S(ref)
is set in
the registers to, for example, 48 kHz, but the actual audio clock or PLL programming actually results in a different
f
S(ref)
in practice, then the time constants would not be correct. See
The Built-In AGC Function in TSC2100/01
and TLV320AIC26/28/32/33 Devices
application report (
SLAA260
).
Copyright 2007, Texas Instruments Incorporated
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TLV320AIC34
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TLV320AIC34EVM-K 功能描述:音頻 IC 開發(fā)工具 TLV320AIC34EVM-K Eval Mod RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評(píng)估:TAS5614L 工作電源電壓:12 V to 38 V
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TLV320AIC34IZASR 功能描述:接口—CODEC Low-Pwr 4-channel CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
TLV320AIC36 制造商:TI 制造商全稱:Texas Instruments 功能描述:Low Power Stereo Audio Codec With Embedded miniDSP
TLV320AIC36EVM-K 功能描述:音頻 IC 開發(fā)工具 TLV320AIC36 Eval Mod RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評(píng)估:TAS5614L 工作電源電壓:12 V to 38 V
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