參數(shù)資料
型號: TLV320AIC34_1
廠商: Texas Instruments, Inc.
元件分類: Codec
英文描述: FOUR-CHANNEL, LOW-POWER AUDIO CODEC FOR PORTABLE AUDIO/TELEPHONY
中文描述: 四通道,低功耗音頻編解碼器的便攜式音頻/電話
文件頁數(shù): 60/94頁
文件大?。?/td> 905K
代理商: TLV320AIC34_1
www.ti.com
TLV320AIC34
SLAS538A–OCTOBER 2007–REVISED NOVEMBER 2007
Page 0 / Register 19:
LINE1LP_x and LINE1LP_x and LINE1LM_xM_x to Left-ADC Control Register
READ/
WRITE
R/W
RESET
VALUE
0
BIT
DESCRIPTION
D7
LINE1L Single-Ended vs Fully Differential Control
If LINE1L is selected to both left- and right-ADC channels, both connections must use the same
configuration (single-ended or fully differential mode).
0: LINE1L is configured in single-ended mode.
1: LINE1L is configured in fully differential mode.
LINE1L Input Level Control for Left-ADC PGA Mix
Setting the input level control to one of the following gains automatically connects LINE1L to the left-ADC
PGA mix.
0000: Input level control gain = 0 dB
0001: Input level control gain = –1.5 dB
0010: Input level control gain = –3 dB
0011: Input level control gain = –4.5 dB
0100: Input level control gain = –6 dB
0101: Input level control gain = –7.5 dB
0110: Input level control gain = –9 dB
0111: Input level control gain = –10.5 dB
1000: Input level control gain = –12 dB
1001–1110: Reserved. Do not write these sequences to these register bits.
1111: LINE1L is not connected to the left-ADC PGA.
Left-ADC Channel Power Control
0: Left-ADC channel is powered down.
1: Left-ADC channel is powered up.
Left-ADC PGA Soft-Stepping Control
00: Left-ADC PGA soft-stepping at once per sample period
01: Left-ADC PGA soft-stepping at once per two
η
e periods
10–11: Left-ADC PGA soft-stepping is disabled.
D6–D3
R/W
1111
D2
R/W
0
D1–D0
R/W
00
Page 0 / Register 20:
LINE2LP_x and LINE2LM_x to Left-ADC Control Register
READ/
WRITE
R/W
RESET
VALUE
0
BIT
DESCRIPTION
D7
LINE2L Single-Ended vs Fully Differential Control
(1)
If LINE2L is selected to both left- and right-ADC channels, both connections must use the same
configuration (single-ended or fully differential mode).
0: LINE2L is configured in single-ended mode.
1: LINE2L is configured in fully differential mode.
LINE2L Input Level Control for Left-ADC PGA Mix
Setting the input level control to one of the following gains automatically connects LINE2L to the left-ADC
PGA mix.
0000: Input level control gain = 0 dB
0001: Input level control gain = –1.5 dB
0010: Input level control gain = –3 dB
0011: Input level control gain = –4.5 dB
0100: Input level control gain = –6 dB
0101: Input level control gain = –7.5 dB
0110: Input level control gain = –9 dB
0111: Input level control gain = –10.5 dB
1000: Input level control gain = –12 dB
1001–1110: Reserved. Do not write these sequences to these register bits.
1111: LINE2L is not connected to the left-ADC PGA.
Left-ADC Channel Weak Common-Mode Bias Control
0: Left-ADC channel unselected inputs are not biased weakly to the ADC common-mode voltage.
1: Left-ADC channel unselected inputs are biased weakly to the ADC common-mode voltage.
Reserved. Write only zeros to these register bits.
D6–D3
R/W
1111
D2
R/W
0
D1–D0
R
00
(1)
LINE1R single-ended vs fully differential control is available for both left and right channels. However, this setting must be same for both
the channels.
60
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Copyright 2007, Texas Instruments Incorporated
Product Folder Link(s):
TLV320AIC34
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