參數(shù)資料
型號(hào)： TLV320AIC34_1
廠商： Texas Instruments, Inc.
元件分類(lèi)： Codec
英文描述： FOUR-CHANNEL, LOW-POWER AUDIO CODEC FOR PORTABLE AUDIO/TELEPHONY
中文描述： 四通道，低功耗音頻編解碼器的便攜式音頻/電話
文件頁(yè)數(shù)： 62/94頁(yè)
文件大?。?/td> 905K
代理商： TLV320AIC34_1
www.ti.com
TLV320AIC34
SLAS538A–OCTOBER 2007–REVISED NOVEMBER 2007
Page 0 / Register 23:
LINE2RP_x and LINE2RM_x to Right-ADC Control Register
READ/
WRITE
R/W
RESET
VALUE
0
BIT
DESCRIPTION
D7
LINE2R Single-Ended vs Fully Differential Control
If LINE2R is selected to both left- and right-ADC channels, both connections must use the same
configuration (single-ended or fully differential mode).
0: LINE2R is configured in single-ended mode.
1: LINE2R is configured in fully differential mode.
LINE2R Input Level Control for Right-ADC PGA Mix
Setting the input level control to one of the following gains automatically connects LINE2R to the
right-ADC PGA mix.
0000: Input level control gain = 0 dB
0001: Input level control gain = –1.5 dB
0010: Input level control gain = –3 dB
0011: Input level control gain = –4.5 dB
0100: Input level control gain = –6 dB
0101: Input level control gain = –7.5-dB
0110: Input level control gain = –9 dB
0111: Input level control gain = –10.5 dB
1000: Input level control gain = –12 dB
1001–1110: Reserved. Do not write these sequences to these register bits.
1111: LINE2R is not connected to the right-ADC PGA.
Right-ADC Channel Weak Common-Mode Bias Control
0: Right-ADC channel unselected inputs are not biased weakly to the ADC common-mode voltage.
1: Right-ADC channel unselected inputs are biased weakly to the ADC common-mode voltage.
Reserved. Write only zeros to these register bits.
D6–D3
R/W
1111
D2
R/W
0
D1–D0
R
00
Page 0 / Register 24:
LINE1LP_x and LINE1LM_x to Right-ADC Control Register
READ/
WRITE
R/W
RESET
VALUE
0
BIT
DESCRIPTION
D7
LINE1L Single-Ended vs Fully Differential Control
If LINE1L is selected to both left- and right-ADC channels, both connections must use the same
configuration (single-ended or fully differential mode).
0: LINE1L is configured in single-ended mode.
1: LINE1L is configured in fully differential mode.
LINE1L Input Level Control for Right-ADC PGA Mix
Setting the input level control to one of the following gains automatically connects LINE1L to the
right-ADC PGA mix.
0000: Input level control gain = 0 dB
0001: Input level control gain = –1.5 dB
0010: Input level control gain = –3 dB
0011: Input level control gain = –4.5 dB
0100: Input level control gain = –6 dB
0101: Input level control gain = –7.5 dB
0110: Input level control gain = –9 dB
0111: Input level control gain = –10.5 dB
1000: Input level control gain = –12 dB
1001–1110: Reserved. Do not write these sequences to these register bits.
1111: LINE1L is not connected to the right-ADC PGA.
Reserved. Write only zeros to these register bits.
D6–D3
R/W
1111
D2–D0
R
000
62
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Copyright 2007, Texas Instruments Incorporated
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TLV320AIC34
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TLV320AIC34IZAS 功能描述:接口—CODEC Low-Pwr 4-channel CODEC RoHS:否 制造商:Texas Instruments 類(lèi)型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類(lèi)型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
TLV320AIC34IZASR 功能描述:接口—CODEC Low-Pwr 4-channel CODEC RoHS:否 制造商:Texas Instruments 類(lèi)型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類(lèi)型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
TLV320AIC36 制造商:TI 制造商全稱(chēng):Texas Instruments 功能描述:Low Power Stereo Audio Codec With Embedded miniDSP
TLV320AIC36EVM-K 功能描述:音頻 IC 開(kāi)發(fā)工具 TLV320AIC36 Eval Mod RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類(lèi)型:Audio Amplifiers 工具用于評(píng)估:TAS5614L 工作電源電壓:12 V to 38 V
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