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STDL130
5-146
Samsung ASIC
FIFO_HDL
High-Density Synchronous First-In First-Out Memory
Logic Symbol
Function Description
FIFO_HDL is a synchronous first-in first-out buffer memory which is provided as a compiler. FIFO_HDL is
intended for use in high-density applications. After valid reset, on the rising of WCK, the write cycle is
initiated when WEN is low, RST is high and FF is low. The data on DI[] is written into the memory location
specified by the write pointer. During normal write operation, the rising edge of WCK will reset EF if it is set.
At the last available memory location, write operation will set FF. DI[] and WEN must satisfy the setup and
hold requirements with respect to the rising edge of WCK.
On the rising edge of RCK, the read cycle is initiated when REN is low, RST is high, RTM is high and EF is
low. The data located in the memory specified by the read pointer comes in DOUT[] after some delay. During
normal read operation, the rising edge of RCK will reset FF if it is set. At the last available memory location
with available data, read operation will set EF. A valid DOUT[] will be possibly in some specified time after
the rising edge of RCK, under that OEN is low. And the output data will remain unchanged until the next
read, reset, or retransmit mode come in. REN must satisfy the setup and hold requirements with respect to
the rising edge of RCK. When OEN is high, DOUT[] is placed in a high-impedance state.
In reset mode, a reset is globally initiated at the falling edge of RST. The reset operation will set EF and
reset FF and make the data output zero.The reset operation will initiate the read pointer and the write pointer
as 0. After reset operation, the status of EF will make RCK inoperable. The valid write input signal will
become operable as RST is high. The read input signal will remain inoperable until EF is reset by the first
valid write.
In retransmit mode, a retransmit is initiated at the falling edge of RTM only if the total number of writes after
a reset operation is less than the word size of the memory in FIFO_HDL and more than 0 (0 < total number
of write < W-1). The retransmit operation will initiate the read pointer as 0 to allow the retransmission of data,
make DOUT[] zero and make EF reset if it is set. The valid read input signal will become operable as RTM is
high.
Features
Suitable for high-density applications
Over-read and over-write protection capability
Retransmit capability
Synchronous operation
Duty-free clock cycle
Asynchronous tri-state output control
Latched full and empty status flag output
Automatic power-down
Flexible aspect ratio
Up to 64Kbits capacity
Up to 8K number of words
Up to 64 number of bits per word
RCK
OEN
RTM
WCK
EF
FF
fifo_hdl_<w>x<b>m<y>
WEN
1. Words(w) is the number of words in FIFO_HDL
2. Bpw(b) is the number of bits per word.
3. Ymux(y) is one of the column mux types.
REN
RST
NOTES:
DI[b-1:0]
DOUT[b-1:0]